Technique
Technique
1157 entities#
1 differential testing
76 2 Coverage-Guided Fuzzing
74 3 hardware fuzzing
66 4 Fuzzing
60 5 Formal Verification
54 6 Symbolic Execution
48 7 Co-Simulation
36 8 constrained random verification
29 9 RTL simulation
28 10 Simulation-Based Verification
27 11 CSR-transition coverage
27 12 constrained-random test generation
26 13 Mutation-Based Fuzzing
26 14 Coverage-Driven Verification
23 15 Reinforcement Learning
20 16 random instruction generation
20 17 Grey-Box Fuzzing
20 18 Hardware-Guided Reinforcement Learning
20 19 Model Checking
19 20 Constrained-Random Stimulus Generation
18 21 Direct Instruction Injection
17 22 Processor Fuzzing
17 23 Model-Based Test Generation
15 24 Constraint Solving
15 25 Bounded Model Checking
15 26 Differential Fuzzing
15 27 register coverage
15 28 RTL Fuzzing
14 29 White-Box Fuzzing
14 30 Coverage-based Greybox Fuzzing
14 31 UVM (Universal Verification Methodology)
14 32 Fuzz Testing
14 33 Bounded Model Checking (BMC)
13 34 Runtime Instruction Morphing
13 35 CPU fuzzing
13 36 Directed Testing
12 37 ISA simulation
12 38 Mutation Testing
12 39 coverage-directed test generation
12 40 Contradiction Analysis
12 41 Guided Test Case Generation
12 42 Constraint Programming
12 43 Asymmetric ISA Pre-Simulation
12 44 Covariance Matrix Adaptation Evolution Strategy
12 45 Property Checking
11 46 Proximal Policy Optimization
11 47 Object-Oriented Stimulus Generation
11 48 Tandem Simulation
11 49 Maximal Convex Subgraph Enumeration
11 50 UniGen2
11 51 Synchronizable Co-simulation
11 52 constrained-random instruction generation
11 53 Hash-based Differential Fault Effect Equivalence Check (CDIF+FEEC)
11 54 LLM-based Test Generation
11 55 Functional Coverage
11 56 Constrained Random Testing
10 57 Constraint-Based Randomization
10 58 Translation Buffer
10 59 Universal Verification Methodology
10 60 Constrained-Random Verification (CRV)
10 61 Automatic Property Generation
9 62 LLM-based Test Code Generation
9 63 Hindley-Milner Type Inference
9 64 Equivalence Checking
9 65 Contention-guided Hardware Fuzzing
9 66 Program Reduction
9 67 litmus tests
9 68 Directed-Random Test Generation
9 69 Mutation-Analysis-Guided Fuzzing
9 70 Black-Box Fuzzing
9 71 Mutation-Based Testing
9 72 Interval Property Checking
9 73 Concolic Testing
9 74 Control Flow Entanglement with Data Flow
9 75 Theorem Proving
9 76 Dynamic Swappable Memory
9 77 on-the-fly instruction stream generation
9 78 instruction sequence generation
8 79 software fuzzing
8 80 Statistical Fault Injection (SFI)
8 81 Uniform Generation of SAT Witnesses
8 82 Random Test Program Generation
8 83 Execution Controller
8 84 GRPO with State Mutation
8 85 Mandatory Read-Only Registers
8 86 Directed Fuzzing
8 87 Emulation
8 88 test program generation
8 89 UVM
8 90 Instruction Scheduling
8 91 Differential Information Flow Tracking
8 92 Counterexample Shrinking
8 93 Coverage-Guided Test Generation
8 94 Batch (tight packing of verification events)
8 95 Squash (order-decoupled fusion)
8 96 Coverage-guided Aging
8 97 Instruction Stream Generation
8 98 constraint-based test generation
8 99 single-instruction isolation
8 100 Multi-Armed Bandit (MAB)
8 100 of 1157 shown
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