Instruction Fuzzing

Technique

Instruction fuzzing is a hardware and microarchitectural testing technique that generates or mutates processor instruction sequences to exercise implementation behavior. In the cited evidence, it is used both for coverage-guided discovery of software-exploitable processor bugs (as in TheHuzz, USENIX Security 2022) and for exploring undocumented microarchitectural behavior relevant to side channels (as in Plumber).

First seen 6/14/2026

Last seen 7/10/2026

Evidence 7 chunks

Wiki v2

WIKI

Instruction Fuzzing

Instruction fuzzing is a technique for testing processors by generating or mutating instruction sequences and observing the resulting behavior. In the provided evidence, it appears in two closely related forms: (1) fuzzing processors with assembly-level instruction streams to increase coverage and uncover software-exploitable hardware vulnerabilities, and (2) using instruction fuzzing together with operand mutation and statistical analysis to explore undocumented microarchitectural behavior. [arxiv-TheHuzz][arxiv-Plumber]

Technique overview

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RELATIONSHIPS

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TheHuzz ← implements 100% 4e

TheHuzz implements instruction fuzzing as indicated by its title.

hardware fuzzing implements → 95% 2e

Instruction fuzzing is a specific approach to hardware fuzzing using instruction sequences.

TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities ← uses 90% 1e

The study centers on instruction fuzzing to test processors.

LINKED ENTITIES

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TheHuzz IMPLEMENTS Extracted graph relationship

CITATIONS

6 sources

6 citations — click to expand

[1] Instruction fuzzing is used in TheHuzz to generate assembly-level instructions that increase coverage metrics modeling hardware-intrinsic HDL behaviors such as signal transitions and floating wires, with the goal of finding software-exploitable hardware vulnerabilities. TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities

[2] Plumber uses a combination of instruction fuzzing, instruction-operand mutation, and statistical analysis to explore undocumented microarchitectural optimizations and derive leakage templates for cache-based side channels, including on ARM Cortex-A53 and -A72 cores, and re-identified a prefetcher-based vulnerability in OpenSSL 1.1.0g. Microarchitectural Leakage Templates and Their Application to Cache-Based Side Channels

[3] TheHuzz is described as supporting Verilog and VHDL, fitting conventional industry-standard IC design and verification flows, detecting software-exploitable hardware vulnerabilities, accounting for different hardware behaviors, not requiring prior knowledge of the design, and scaling to large designs. TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities

[4] TheHuzz was evaluated on four popular open-source processors, detected 11 bugs including 8 new vulnerabilities, and achieved 1.98x speed over the industry-standard random regression approach and 3.33x speed over DiffuzRTL. TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities

[5] TheHuzz was authored by Rahul Kande, Addison Crump, Garrett Persyn, Patrick Jauernig, Ahmad-Reza Sadeghi, Aakash Tyagi, and Jeyavijayan Rajendran. TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities - USENIX

[6] TheHuzz was published at the 31st USENIX Security Symposium (USENIX Security 22), Boston, MA, August 10–12, 2022, on pages 3219–3236 (ISBN 978-1-939133-31-1), with Kevin R. B. Butler and Kurt Thomas as proceedings editors. TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities - USENIX