Equivalence Checking

Technique

First seen 6/20/2026

Last seen 6/20/2026

Evidence 9 chunks

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10 connections

The paper presents a methodology that uses equivalence checking to validate microprocessors.

Logic Cones uses → 95% 2e

Equivalence checking uses logic cones to segment design into manageable sections.

Equivalence checking uses a golden reference model against which the implementation is verified.

The ADL-driven validation framework uses equivalence checking to verify processor implementations.

Pipelined processor validation in this paper uses equivalence checking as its formal method.

Verplex Conformal ← implements 85% 1e

Verplex Conformal is mentioned as an equivalence checking tool.

Synopsys Formality ← implements 95% 1e

Synopsys Formality is an equivalence checking tool.

Equivalence checking employs compare point matching to map reference and implementation design outputs.

Cadence Affirma ← implements 85% 1e

Cadence Affirma is mentioned as an equivalence checking tool.

Mentor FormalPro ← implements 85% 1e

Mentor FormalPro is mentioned as a formal equivalence checking tool.