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ADL-driven Validation Framework

Concept

An ADL-driven validation framework uses an Architecture Description Language (ADL) specification—specifically the EXPRESSION ADL—as the source of truth to automatically generate a synthesizable HDL reference model, which is then compared against the manually implemented RTL design via equivalence checking to ensure the original RTL is golden.

First seen 6/20/2026
Last seen 6/20/2026
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Overview

The ADL-driven Validation Framework is a methodology introduced in A Methodology for Validation of Microprocessors using Equivalence Checking (MTV'03). It shifts the notion of "golden" design from the manually written RTL to an automatically synthesized HDL model derived from a formal Architecture Description Language (ADL) specification. By treating the ADL specification as the authoritative description of the processor and using equivalence checking between the synthesized HDL and the RTL implementation, the framework validates that the manually coded RTL design faithfully reflects the architectural intent.

Motivation

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RELATIONSHIPS

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A Methodology for Validation of Microprocessors using Equivalence Checking ← introduces 100% 2e
The paper introduces an ADL-driven validation framework for microprocessors.
Equivalence Checking uses → 100% 2e
The ADL-driven validation framework uses equivalence checking to verify processor implementations.
Golden Reference Model uses → 100% 2e
The ADL-driven validation framework generates a golden reference model from ADL specification.
EXPRESSION ADL uses → 100% 1e
The ADL-driven validation framework uses EXPRESSION ADL for architecture specification.

LINKED ENTITIES

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A Methodology for Validation of Microprocessors using Equivalence Checking INTRODUCES Extracted graph relationship
Equivalence Checking USES Extracted graph relationship
EXPRESSION ADL USES Extracted graph relationship
Golden Reference Model USES Extracted graph relationship

CITATIONS

6 sources
6 citations — click to expand
[1] The ADL-driven validation framework is complementary to existing formal verification approaches and ensures that the original RTL design is golden. A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop
[2] The framework reduces the validation problem to checking equivalence of two terms in a logic with equality and uninterpreted function symbols. A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop
[3] The framework specifies the architecture in EXPRESSION ADL, then generates a synthesizable HDL model and uses equivalence checking against the RTL design. A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop
[4] The EXPRESSION ADL captures structure, behavior, and mapping (between structure and behavior) of the programmable architecture, including units, storages, ports, connections, pipeline edges, and data transfer edges. A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop
[5] The HDL generator composes a decoder (extracting opcodes/operands and using mapping to route instructions through pipeline latches) and a datapath (instantiating and connecting fetch, decode, ALU, LdSt, writeback, branch, caches, register files, memories, etc.). A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop
[6] A case study validates the DLX architecture using the generated reference model. A methodology for validation of microprocessors using equivalence checking - Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop