Tandem Simulation

Technique

First seen 6/6/2026

Last seen 6/6/2026

Evidence 11 chunks

NEIGHBORHOOD

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RELATIONSHIPS

22 connections

Transaction-Level Model (TLM) ← compares with 88% 2e

TLM/RTL co-simulation is compared to tandem simulation in related work

Refinement Map uses → 97% 2e

Tandem simulation uses refinement maps for automation

Jump-Starting (Warm-Up Simulation) implements → 97% 2e

Tandem simulation supports jump-starting the RTL simulation

Architectural Variable (AV) uses → 98% 2e

Tandem simulation checks and swaps architectural variables

Micro-Architectural Variables uses → 90% 2e

Tandem simulation must handle micro-architectural variables during AV-Swap

Testbench uses → 90% 2e

Tandem simulation requires testbenches for both ILEM and RTEM

Bug Detection uses → 97% 2e

Tandem simulation enables earlier bug detection

Tandem Generator ← implements 97% 2e

Tandem Generator implements the automated tandem simulation flow

Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models ← introduces 95% 2e

The paper generalizes and introduces an automated tandem simulation methodology for both processors and accelerators

Cold Start uses → 93% 1e

Tandem simulation uses cold start to initialize micro-architectural variables

conformance testing implements → 87% 1e

Tandem simulation is an improvement over traditional conformance testing

RTL Co-simulation ← compares with 90% 1e

RTL co-simulation is another name for tandem simulation with ISA simulator

Checkpoint Map uses → 93% 1e

Tandem simulation uses checkpoint maps for Scenario 2 checking

Instruction Map uses → 95% 1e

Tandem simulation uses instruction maps to detect instruction boundaries

Instruction-Level Execution Model (ILEM) uses → 98% 1e

Tandem simulation combines the ILEM with RTEM

RTL-Based Execution Model (RTEM) uses → 98% 1e

Tandem simulation combines the RTEM with ILEM

Cross-Level Execution Model (CLEM) implements → 93% 1e

Tandem simulation implements the cross-level execution model by combining ILEM and RTEM

AV-Check uses → 97% 1e

Tandem simulation checks architectural variables at instruction boundaries

AV-Swap uses → 97% 1e

Tandem simulation uses AV-Swap for jump-starting

Instruction-Level Abstraction (ILA) uses → 97% 1e

Tandem simulation leverages ILA for accelerator modeling

AV Map uses → 95% 1e

Tandem simulation uses AV maps to define correspondence between ILAVs and RTAVs

Instruction-by-Instruction Checking implements → 95% 1e

Tandem simulation performs instruction-by-instruction checking