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STIMSMITH
Concept

Concept

4823 entities
#
1
PCI Bus
3
2
constrained random test bench for ARM AMBA
3
3
Machine Programming
3
4
rand_vec<T>
3
5
Over-constraint Analysis
3
6
Bubble Sort Input Generation
3
7
performance counters
3
8
Inline Constraints
3
9
RISC-V compliance test suite
3
10
RISC-V Rocket Core
3
11
Natural Language Specification
3
12
Redundant State and Transition Elimination
3
13
x86_64 Instruction Encoding
3
14
ISA-level Verification
3
15
Dynamic Constraint Management
3
16
Invalid+Valid Sequences (IVS) test set
3
17
Test Case Refinement
3
18
Electronic System Level Design
3
19
bi-variate linear constraints
3
20
Vulnerability Discovery
3
21
Burn-In Test
3
22
loop_test
3
23
verification database
3
24
Concretization
3
25
jump_stress_test
3
26
Instruction Block Concatenation
3
27
Reachability Property
3
28
AES Key Schedule
3
29
CPU processor design
3
30
test sequence tokenization
3
31
instruction embedding
3
32
linear feedback shift register
3
33
Supervised Learning
3
34
Sandboxing
3
35
strip weight
3
36
Portable Stimulus
3
37
Input Grammar
3
38
instruction tokenization and encoding
3
39
ISA-compliant Test Generation
3
40
Pipeline Mechanism
3
41
CodeCheckRunner
3
42
Multi-Group Mapping
3
43
subnormal floating point numbers
3
44
Instruction Bus (IBus)
2
45
Dynamic Base Block Cache
2
46
Load Store Cache
2
47
Stimulus Coverage
2
48
dynamic symbolic execution
2
49
Equivalence Proof
2
50
test generator
2
51
MSHRush
2
52
PicoRV32 (Pico)
2
53
Test Template Description Language
2
54
FlexNLP RTL
2
55
auto-regression
2
56
CodeCompareRunner
2
57
Cache Side-Channel Attack
2
58
Side-Channel Security
2
59
DIFUZZRTL Source Code
2
60
Cross-Checking Execution Results
2
61
multiplier functional unit
2
62
Self-Compositional Framework
2
63
Pseudo Memory Unit
2
64
instr datatype
2
65
Verilog
2
66
formal processor model
2
67
data forwarding path testing
2
68
ARM
2
69
Exception Carry-on Template
2
70
ASMcoret record
2
71
register bypassing
2
72
shadow logic
2
73
Freeze Variable
2
74
Non-shrinkable Sequences
2
75
RVBS
2
76
Assertion-Based Testing
2
77
assertSE primitive
2
78
Algorithm 1 TGen
2
79
software-facing verification
2
80
RISC-V instruction generation
2
81
CVE (Common Vulnerabilities and Exposures)
2
82
partially instantiated test program
2
83
on-the-fly test generation
2
84
cache miss penalty
2
85
data dependency stall
2
86
Transaction-Level Model (TLM)
2
87
pipeline resource token manager
2
88
global state space exploration
2
89
Pipelined Execution
2
90
dynamic branch predictor
2
91
Vector Register File
2
92
Search Space Heuristics
2
93
non-influencing (ni) instructions
2
94
control-influencing (ci) instructions
2
95
Hardware Multithreading
2
96
Non-overlapping Rectangles
2
97
Return Address Stack (RAS)
2
98
Graph Coloring
2
99
Architectural Coverage
2
100
RWKV
2
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