Tiny Code Generator (TCG)

Concept

Tiny Code Generator (TCG) is the architecture-agnostic intermediate representation used by QEMU in its dynamic binary translation pipeline. In the OpenVADL QEMU-generation flow, VIAM processor descriptions are lowered to TCG operations and emitted as C translation functions such as trans_addi.

First seen 5/29/2026

Last seen 5/29/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

Tiny Code Generator (TCG) is the architecture-agnostic intermediate representation used in QEMU's dynamic binary translation flow. The cited OpenVADL presentation describes QEMU as an open-source machine emulator that uses dynamic binary translation and employs TCG as an architecture-agnostic IR within its modular architecture.

Position in QEMU translation

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

2 connections

QEMU ← uses 100% 1e

QEMU uses TCG as its architecture-agnostic intermediate representation.

trans_addi TCG Translation Function ← uses 100% 1e

The trans_addi function uses TCG primitives such as tcg_gen_add_i64 and tcg_gen_mov_i64.

LINKED ENTITIES

2 links

QEMU USES Extracted graph relationship

trans_addi TCG Translation Function USES Extracted graph relationship

CITATIONS

5 sources

5 citations — click to expand

[1] QEMU is described as an open-source machine emulator that uses dynamic binary translation and employs TCG as an architecture-agnostic IR. Generation of a QEMU-Based Instruction Set Simulator from a Processor Description in OpenVADL

[2] The QEMU translation pipeline is depicted as moving from a guest frontend through TCG IR to a host backend. Generation of a QEMU-Based Instruction Set Simulator from a Processor Description in OpenVADL

[3] OpenVADL generates QEMU frontends by lowering VIAM to TCG operations and then generating C code. Generation of a QEMU-Based Instruction Set Simulator from a Processor Description in OpenVADL

[4] The generated `trans_addi` function uses TCG value types and helper calls including `tcg_temp_new_i64`, `tcg_constant_i64`, `tcg_gen_add_i64`, and `tcg_gen_mov_i64`. Generation of a QEMU-Based Instruction Set Simulator from a Processor Description in OpenVADL

[5] The cited OpenVADL conclusion reports generated QEMU frontends and up to 44% lower runtime than upstream, achieved by lowering VIAM to TCG operations. Generation of a QEMU-Based Instruction Set Simulator from a Processor Description in OpenVADL