Concept
Concept
4823 entities#
1 GPU instruction set
2 2 Non-overlapping Rectangles
2 3 Return Address Stack (RAS)
2 4 Genetic Programming
2 5 Bit-flip Fault Effect
2 6 Graph Coloring
2 7 Architectural Coverage
2 8 Loop Unrolling
2 9 Invariant
2 10 Benchmark Testing
2 11 loop snippet
2 12 conditional branch snippet
2 13 executable semantics
2 14 capability compression
2 15 Burn-In Programs
2 16 Sv48
2 17 Sv39
2 18 bounded load/store operations
2 19 straight-line instruction sequence
2 20 Jupyter notebooks
2 21 Async-Lock-Step Compare
2 22 Micro-Architectural Variables
2 23 Execution Runner
2 24 snippet
2 25 Vector Extensions
2 26 Hypervisor Extensions
2 27 Selective Testing
2 28 Five-Stage Pipeline CPU
2 29 instruction generation algorithm
2 30 CISC CPU
2 31 Attributes YAML
2 32 Coverage Group Format
2 33 Test Format Spec
2 34 Program Input Generation
2 35 Inevitable State
2 36 software compartmentalization
2 37 Operation Properties
2 38 principle of least privilege
2 39 Unreachable State Identification
2 40 Simulation-based Equivalence Checking
2 41 Checkpoint Map
2 42 Default Data Capability
2 43 Electromagnetic Pulse
2 44 regfile_glitches
2 45 Wasm Validator
2 46 SMV model checker
2 47 uvm-verilator
2 48 Random Tests
2 49 Clock Glitch
2 50 opcode distribution and weighting
2 51 ebpf-for-windows
2 52 code-based test generation
2 53 Kernel Memory Leak
2 54 instruction field randomization
2 55 Linux ARM32 eBPF Implementation
2 56 eBPF Bytecode Test
2 57 Instruction Transaction Class
2 58 Opcode Transaction Class
2 59 Register Reuse
2 60 Merged Sequences (MS) test set
2 61 Hello World Test
2 62 Liveness Verification
2 63 Illegal Opcode Injection
2 64 Privileged CSR
2 65 RefCovRunner
2 66 self-equivalence with don't-cares
2 67 MIPS
2 68 RSH Instruction
2 69 ALU Constraint Verification
2 70 Majority Vote Oracle
2 71 Garbage Collection
2 72 CodeCompareRunner
2 73 Non-Determinism Removal
2 74 solution space projection
2 75 Constraint Solving for Instruction Generation
2 76 POWER Architecture
2 77 test controller
2 78 mishegos worker
2 79 adversarial instruction sequence
2 80 Instruction Group Cross-product Coverage Points
2 81 Exception Carry-on Template
2 82 abstract specification
2 83 worker process ABI
2 84 SoCFPGA Co-emulation
2 85 dynamic symbolic execution
2 86 cohort output
2 87 instruction prefix
2 88 shadow logic
2 89 instruction fetch matching algorithm
2 90 Lock-Step Compare
2 91 CVE (Common Vulnerabilities and Exposures)
2 92 Instruction Decode (ID) stage
2 93 x86_64 instruction format
2 94 SPLASH-2 benchmarks
2 95 Coverage-guided Aging Counter
2 96 generate_directed_instr_stream function
2 97 Instruction Memory (IMem)
2 98 data-flow coverage
2 99 Conservative Approximation
2 100 Dynamic Array
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