Verifying Instruction Set Simulators using Coverage-guided Fuzzing
Paper“Verifying Instruction Set Simulators using Coverage-guided Fuzzing” is a DATE 2019 paper by V. Herdt, D. Große, H. M. Le, and R. Drechsler. The available evidence identifies it as a paper on coverage-guided fuzzing for instruction set simulator verification and highlights future-work directions including improving the V(RD) functional metric, exploring machine-learning-assisted fuzzing, evaluating stronger but scalable coverage metrics, broadening to more architectures and instruction sets, and extending analysis beyond the ISS component.
First seen 5/26/2026
Last seen 6/8/2026
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“Verifying Instruction Set Simulators using Coverage-guided Fuzzing” is cited as a DATE 2019 paper by V. Herdt, D. Große, H. M. Le, and R. Drechsler, appearing on pages 360–365. [publication]
The provided evidence excerpts mainly cover the paper’s future-work and conclusion material. They identify the work as applying coverage-guided fuzzing in the context of instruction set simulator verification, and discuss several directions for extending the approach. [publication]
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42 connectionsThe paper uses code coverage as a guiding metric in the fuzzing approach.
The paper evaluates Spike as a reference ISS and finds an error in it.
The paper integrates functional coverage as part of the fuzzing approach.
The paper implements its CGF approach on top of libFuzzer.
Vladimir Herdt is listed as an author of the paper.
The approach transforms bytestreams into ELF binaries for ISS execution.
The paper evaluates Forvis as a reference ISS.
Daniel Große is listed as an author of the paper.
Rolf Drechsler is listed as an author of the paper.
The paper integrates RISC-V ISA Tests for comparison in the evaluation.
The paper discusses model-based test generation as related work and compares it with the proposed CGF approach.
The paper proposes a novel coverage-guided fuzzing approach for ISS verification.
The paper uses branch coverage as part of its coverage metrics.
The paper evaluates the RISC-V Virtual Prototype as the ISS under test.
Hoang M. Le is listed as an author of the paper.
The paper introduces a novel functional coverage metric tailored for ISS verification.
The paper proposes and uses coverage-guided fuzzing for ISS verification.
The paper integrates RISC-V Torture Test Generator for comparison in the evaluation.
The paper discusses constrained random verification as a complementary technique.
The paper mentions bayesian network based coverage-guided test generation as a related approach.
The paper mentions this related work on coverage-guided fuzzing for ISS verification.
The paper addresses processor stimulus generation as a key aspect of ISS verification.
The paper proposes and evaluates a method to verify instruction set simulators.
The paper is affiliated with University of Bremen.
The paper is affiliated with DFKI GmbH.
The paper integrates RISC-V Torture as a baseline comparison tool.
The paper mentions dynamic program analysis as a semi-formal method applicable to ISS verification.
The paper focuses on improving the testcase generation process via fuzzing.
The paper evaluates how ISSs handle illegal instructions and found related errors.
The paper compares its CGF approach against the RISC-V Torture test generator.
The paper compares its CGF approach against the RISC-V ISA tests.
The paper cites work on coverage-guided fuzzing for ISS verification.
The paper mentions SMT solvers used in model-based test generation approaches.
The paper applies its approach to the RV32IMA ISS.
The paper mentions CSP/SMT solvers used in model-based test generation approaches.
The paper uses differential testing by comparing execution results across multiple ISSs.
The paper uses instruction sequences as part of the custom mutation procedure.
The paper mentions constrained random techniques as a complementary approach.
The paper mentions machine learning integration into fuzzing as a promising direction.
The paper mentions dynamic program analysis as a semi-formal method applicable to ISS verification.
The paper evaluates instruction decoder correctness, finding an error in Spike's decoder.
The paper mentions machine learning integration into fuzzing as a promising future direction.
LINKED ENTITIES
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7 sources7 citations — click to expand
[1] The paper is a DATE 2019 publication by V. Herdt, D. Große, H. M. Le, and R. Drechsler, appearing on pages 360–365. Efficient Cross-Level Testing for
[2] The paper discusses using ideas for covering output-operand values to help maximize the functional V(RD) metric. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[3] The paper identifies machine-learning techniques for fuzzing as a promising future direction in its application area. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[4] The paper states that path coverage and cross-coverage of functional metrics can be effective but challenging or impractical because of the large feature state space. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[5] The paper proposes selective path coverage and selective functional cross-coverage, applied to selected code regions such as per-instruction ISS evaluation paths and input operand values, to improve verification while maintaining scalability. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[6] The paper proposes broadening evaluation to further architectures and instruction sets and applying the coverage-guided fuzzing approach to whole-platform analysis rather than only the ISS component. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[7] Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study cites the paper in its references. Efficient Cross-Level Testing for