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University of Bremen

Organization

In the provided evidence, the University of Bremen appears through the Institute of Computer Science in Bremen, Germany, as an affiliation for authors working on RISC-V and processor-verification research. The evidence links the organization to work on cross-level RTL processor verification with randomized coverage-guided instruction streams, and the related paper context covers coverage-guided fuzzing for instruction set simulator verification.

First seen 5/25/2026
Last seen 6/9/2026
Evidence 11 chunks
Wiki v4

WIKI

Overview

Within the provided evidence, the University of Bremen appears as the Institute of Computer Science, University of Bremen, 28359 Bremen, Germany on a processor-verification publication. In that paper, Niklas Bruns, Vladimir Herdt, and Rolf Drechsler are listed with the University of Bremen affiliation; Herdt and Drechsler are also listed with Cyber-Physical Systems, DFKI GmbH, while Eyck Jentzsch is listed with MINRES Technologies GmbH.[C1]

Technical research context in the evidence

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NEIGHBORHOOD

4 nodes · 5 edges
graph · University of Bremen · depth=1

RELATIONSHIPS

12 connections
Rolf Drechsler ← part of 100% 6e
Rolf Drechsler is affiliated with the University of Bremen
Vladimir Herdt ← part of 100% 4e
Vladimir Herdt is affiliated with the University of Bremen.
Niklas Bruns ← part of 100% 3e
Niklas Bruns is affiliated with the University of Bremen.
Ulrich Kühne ← part of 100% 3e
The work was carried out jointly by the group for computer architecture at University of Bremen.
Verifying Instruction Set Simulators using Coverage-guided Fuzzing ← published by 100% 2e
The paper is affiliated with University of Bremen.
Advanced Automation in Formal Verification of Processors ← published by 75% 1e
The paper was jointly produced by University of Bremen and OneSpin Solutions GmbH.
Cross-level processor verification via endless randomized instruction stream generation with coverage-guided aging ← authored by 95% 1e
The paper is affiliated with the University of Bremen.
Sören Tempel ← part of 100% 1e
Sören Tempel is affiliated with the University of Bremen
Daniel Große ← part of 100% 1e
Daniel Große is affiliated with the University of Bremen.
Hoang M. Le ← part of 100% 1e
Hoang M. Le is affiliated with the University of Bremen.
Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models ← authored by 100% 1e
The paper is affiliated with the University of Bremen
Constrained Random Verification for RISC-V: Overview, Evaluation and Discussion ← published by 95% 1e
The paper is affiliated with the University of Bremen.

LINKED ENTITIES

2 links
Verifying Instruction Set Simulators using Coverage-guided Fuzzing PUBLISHED_BY Extracted graph relationship
Cross-level processor verification via endless randomized instruction stream generation with coverage-guided aging AFFILIATION_OF_AUTHORS The evidence lists the Institute of Computer Science, University of Bremen, as an affiliation for Niklas Bruns, Vladimir Herdt, and Rolf Drechsler on this paper.

CITATIONS

2 sources
2 citations — click to collapse
[1] The 2022 cross-level processor-verification paper lists the Institute of Computer Science, University of Bremen, as an affiliation for Niklas Bruns, Vladimir Herdt, and Rolf Drechsler, and describes an RTL verification method based on endless randomized coverage-guided instruction streams, ISS co-simulation, and Coverage-guided Aging for a RISC-V case study. Cross-Level Processor Verification via
[2] The 2019 paper on verifying instruction set simulators proposes coverage-guided fuzzing for ISS verification, adds functional coverage and ISS-specific mutation, implements the approach on LLVM libFuzzer, evaluates it on three public RISC-V ISSs, and reports finding new errors including one in Spike. Verifying Instruction Set Simulators using Coverage-guided Fuzzing