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STIMSMITH
Concept

Concept

4823 entities
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1
NaN-boxing
8
2
Data Forwarding
8
3
Instruction Sequence Mutation
8
4
RISC-V UnifiedDB
8
5
MIPS-I Instruction Set
8
6
Testing Knowledge
8
7
microprocessor
8
8
Control Flow Graph (CFG)
8
9
Time-to-Exposure
8
10
Atomic Instruction (AI)
8
11
exception handling
8
12
inter-processor interrupts
8
13
dynamic interleaving of test templates
8
14
Finite State Machine (FSM) Model
8
15
ALU
8
16
Device Under Test (DUT)
8
17
Random Test Program Generation
8
18
statement coverage
8
19
reference model comparison
8
20
Transient Window
8
21
Formal Specification
8
22
rewrite rules
8
23
XiangShan
8
24
Machine State
8
25
Translation Lookaside Buffer
8
26
Spectre
8
27
AXI interface
8
28
Basic Block Agent
8
29
Mutation-based Fuzzing
8
30
Program Agent
8
31
Processor-level Input Stimuli Generation
8
32
Distinguishing Test Case
8
33
UVM agent
8
34
Composition Method
8
35
RISC-V Processor Verification
8
36
design under verification (DUV)
8
37
structural semantics
8
38
Instruction-Level Abstraction (ILA)
8
39
cross-level testing
8
40
Prompt Engineering
8
41
Hardware Verification
8
42
Constraint Block
8
43
UVM Sequence
8
44
Register Renaming
8
45
CHERI-RISC-V
8
46
Instruction Cache
8
47
Instruction Fetch Unit
8
48
Binary Decision Diagram
8
49
Neural Network
8
50
instruction/data stream
8
51
instruction block
8
52
Rocket Core
8
53
Processor Stimulus Generation
8
54
Uninterpreted Functions
8
55
co-simulation testbench
8
56
Last Branch Queue
8
57
Priority Scheduler
8
58
Production Rules
8
59
Program Instruction Sequence
8
60
test oracle
8
61
IBM POWER7
8
62
T-Head C910 CPU
8
63
unit testing
8
64
RTL Fuzzing
7
65
HLS Synthesis Pragmas
7
66
common instruction scenario base class
7
67
Coverage Bitmap
7
68
Satisfiability Modulo Theories
7
69
theorem proving
7
70
Formal Property Verification
7
71
MulDiv module
7
72
custom RISC-V instruction
7
73
ELF Binary
7
74
Directed Testing
7
75
Hard-to-Activate Regions
7
76
Covergroup
7
77
Machine Learning Based Performance Prediction
7
78
Property Decomposition
7
79
Silent Data Corruption
7
80
Priority Scheduler
7
81
Verification IP
7
82
Generation Function
7
83
conformance testing
7
84
Instruction Tree
7
85
verify_solutions method
7
86
T-Head XuanTie C910 CPU
7
87
Program Mutant
7
88
Instruction Field Level Mutation
7
89
Binary Program
7
90
SoC
7
91
General Purpose Registers (GPRs)
7
92
Coverage-guided Aging
7
93
Bluespec
7
94
rand_obj
7
95
Restart Policy
7
96
Side-Channel Attack
7
97
pseudo-random test program generation
7
98
Particle Swarm Optimization
7
99
DFI Controller
7
100
Stimulus Template
7
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