arithmetic operations

Concept

In the VAMP microprocessor test-generation case study, arithmetic operations are treated as a distinct subset of processor instructions. They are tested using model-based unit tests and instruction-sequence tests constrained by the predicate `is_arith`; examples include generated addition and subtraction instructions such as `Iaddi`, `Isub`, and `Iadd`.

First seen 5/26/2026

Last seen 5/26/2026

Evidence 4 chunks

Wiki v1

WIKI

Overview

In the VAMP microprocessor case study, arithmetic operations are one of the instruction categories considered for conformance testing. The VAMP implements the full DLX instruction set, which includes load/store operations, shift operations, jump-and-link operations, and various arithmetic and logical operations. [C1]

The study uses an assembler-level abstraction of the VAMP instruction set to avoid direct bit-vector representations. In this abstraction, addresses are represented as natural numbers, while registers and memory contents are represented as integers. [C2]

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RELATIONSHIPS

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Instruction Set Architecture part of → 100% 1e

Arithmetic operations are part of the DLX/VAMP instruction set.

LINKED ENTITIES

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HOL-TestGen generates_tests_for The evidence describes HOL-TestGen generating test cases for arithmetic operations and notes its granularity behavior for integer variables.

CITATIONS

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[1] The VAMP implements the full DLX instruction set, including various arithmetic and logical operations. Test Program Generation for a Microprocessor: A Case Study

[2] The assembler-level abstraction represents addresses as natural numbers and register and memory contents as integers. Test Program Generation for a Microprocessor: A Case Study

[3] The study uses unit testing for individual operations and sequence testing for instruction sequences, and it studies arithmetic operations as one of four instruction categories. Test Program Generation for a Microprocessor: A Case Study

[4] Arithmetic-operation unit tests are constrained by the predicate is_arith, and each arithmetic operation is covered by one generated test case, with Iaddi given as an addition example. Test Program Generation for a Microprocessor: A Case Study

[5] HOL-TestGen’s arithmetic-test granularity is coarse in this model because registers are represented as integers and the tool selects one candidate per integer variable; finer case distinctions are suggested as a workaround. Test Program Generation for a Microprocessor: A Case Study

[6] Arithmetic sequence testing constrains instruction lists with list_all is_arith and checks conformance after executing the sequence. Test Program Generation for a Microprocessor: A Case Study

[7] A generated arithmetic instruction sequence shown in the study is ISUB followed by two IADD instructions, corresponding to a subtraction followed by two addition operations. Test Program Generation for a Microprocessor: A Case Study

[8] The assembler model is used for black-box conformance testing to check that the processor behaves as described independently of internal implementation details such as interrupts, virtual memory, caching, pipelining, and instruction reordering. Test Program Generation for a Microprocessor: A Case Study