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arithmetic operations

Concept WIKI v1 · 5/26/2026

In the VAMP microprocessor test-generation case study, arithmetic operations are treated as a distinct subset of processor instructions. They are tested using model-based unit tests and instruction-sequence tests constrained by the predicate `is_arith`; examples include generated addition and subtraction instructions such as `Iaddi`, `Isub`, and `Iadd`.

Overview

In the VAMP microprocessor case study, arithmetic operations are one of the instruction categories considered for conformance testing. The VAMP implements the full DLX instruction set, which includes load/store operations, shift operations, jump-and-link operations, and various arithmetic and logical operations. [C1]

The study uses an assembler-level abstraction of the VAMP instruction set to avoid direct bit-vector representations. In this abstraction, addresses are represented as natural numbers, while registers and memory contents are represented as integers. [C2]

Place in the testing approach

The case study applies two main testing scenarios: model-based unit testing and sequence testing. Unit testing is used to test each operation or instruction individually with different data, while sequence testing is used to test instruction sequences up to a given length. The authors studied four instruction categories separately: memory-related load/store operations, arithmetic operations, logic operations, and control-flow-related operations. [C3]

For arithmetic operations specifically, the test purpose predicate is_arith is used to constrain generated tests to arithmetic instructions. The unit-test specification shown in the study is:

test_spec σ= exec_instr σ0i =⇒is_arith i =⇒SUT σ0i σ
apply (gen_test_cases 0 1 SUT)
store_test_thm  arith_instr

Under this setup, each arithmetic operation is covered by one generated test case. The paper gives an example test case containing Iaddi, described as a test case for an addition operation. [C4]

Test granularity

The study notes that HOL-TestGen applies a fairly coarse granularity to arithmetic-operation tests in this model: for an integer variable, it selects just one value satisfying the constraints. This is attributed both to the model’s representation of registers as integers rather than 32-bit words and to HOL-TestGen’s heuristic of selecting one candidate per variable. [C5]

The suggested workaround is to refine the test-purpose definitions with additional case distinctions, so that test selection must find solutions for finer-grained constraint classes. [C5]

Sequence testing example

Arithmetic operations are also used in sequence testing. The sequence-test specification constrains an instruction list with list_all is_arith and checks conformance between the model execution and the system under test after executing the sequence. [C6]

One generated arithmetic sequence is:

ISUB  2 1 0
IADD  1 5 2
IADD  1 0 4

The study states that this sequence corresponds to a subtraction followed by two addition operations. [C7]

Role in processor conformance

Within the broader conformance-testing setting, arithmetic-operation tests are part of checking that the processor behaves according to the assembler model independently of internal implementation details. The assembler model abstracts away details such as interrupt handling, virtual memory and caching, pipelining, and instruction reordering. [C8]

LINKED ENTITIES

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CITATIONS

8 sources
8 citations
[1] The VAMP implements the full DLX instruction set, including various arithmetic and logical operations. Test Program Generation for a Microprocessor: A Case Study
[2] The assembler-level abstraction represents addresses as natural numbers and register and memory contents as integers. Test Program Generation for a Microprocessor: A Case Study
[3] The study uses unit testing for individual operations and sequence testing for instruction sequences, and it studies arithmetic operations as one of four instruction categories. Test Program Generation for a Microprocessor: A Case Study
[4] Arithmetic-operation unit tests are constrained by the predicate is_arith, and each arithmetic operation is covered by one generated test case, with Iaddi given as an addition example. Test Program Generation for a Microprocessor: A Case Study
[5] HOL-TestGen’s arithmetic-test granularity is coarse in this model because registers are represented as integers and the tool selects one candidate per integer variable; finer case distinctions are suggested as a workaround. Test Program Generation for a Microprocessor: A Case Study
[6] Arithmetic sequence testing constrains instruction lists with list_all is_arith and checks conformance after executing the sequence. Test Program Generation for a Microprocessor: A Case Study
[7] A generated arithmetic instruction sequence shown in the study is ISUB followed by two IADD instructions, corresponding to a subtraction followed by two addition operations. Test Program Generation for a Microprocessor: A Case Study
[8] The assembler model is used for black-box conformance testing to check that the processor behaves as described independently of internal implementation details such as interrupts, virtual memory, caching, pipelining, and instruction reordering. Test Program Generation for a Microprocessor: A Case Study