UVM scoreboard

Concept

A UVM scoreboard is a checking component used in a UVM verification environment to compare device-under-test results against expected results from a reference model. In the cited RISC-V vector accelerator verification environment, the scoreboard compares VPU instruction results with Spike-generated reference results when instructions complete.

First seen 5/27/2026

Last seen 6/1/2026

Evidence 4 chunks

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WIKI

Overview

A UVM scoreboard is used to check correctness by comparing the results produced by a design under test with expected results from a reference model. In the RISC-V vector accelerator verification environment described in the evidence, the scoreboard was introduced after a basic UVM setup could run simple instructions but did not yet assert whether instruction execution or results were correct. [C1]

Role in the verification flow

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RELATIONSHIPS

8 connections

Functional Verification of a RISC-V Vector Accelerator ← uses 99% 4e

A UVM scoreboard is used to compare VPU results with reference model results

UVM ← implements 95% 2e

The UVM environment includes a scoreboard that compares VPU results with reference model results.

UVM testbench part of → 95% 2e

The UVM testbench contains a scoreboard component for result comparison.

Reference Model uses → 99% 2e

The UVM scoreboard compares VPU results against those from the reference model.

Reduction Reference Model in C uses → 97% 1e

For unordered floating-point reductions, the UVM scoreboard uses an independent C reference model instead of Spike.

spike uses → 98% 1e

The scoreboard directly takes information from Spike as reference

UVM testbench ← uses 95% 1e

The UVM testbench includes a scoreboard for result comparison.

UVM environment ← uses 98% 1e

The UVM environment includes a UVM scoreboard to compare VPU results with the reference model.

LINKED ENTITIES

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Functional Verification of a RISC-V Vector Accelerator USES Extracted graph relationship

UVM testbench PART_OF Extracted graph relationship

CITATIONS

7 sources

7 citations — click to expand

[1] A UVM scoreboard was introduced because the initial UVM setup could run simple instructions but did not assert whether results or instruction execution were correct. Functional Verification of a RISC-V Vector Accelerator

[2] The scoreboard compares VPU results with reference-model results produced by Spike in a UVM co-simulation environment. Functional Verification of a RISC-V Vector Accelerator

[3] Spike is used both as a scalar core providing vector instructions to UVM in program order and as a golden/reference model for checking DUT results. Functional Verification of a RISC-V Vector Accelerator

[4] The scoreboard is connected to the completed monitor, and a comparison method runs when an instruction finishes. Functional Verification of a RISC-V Vector Accelerator

[5] For vector-result checking, the environment accesses physical vector registers at instruction completion and includes the destination vector-register value extracted from Spike. Functional Verification of a RISC-V Vector Accelerator

[6] Mismatch detection is crucial but may not identify the cause of an error, so SystemVerilog assertions were added to improve observability. Functional Verification of a RISC-V Vector Accelerator

[7] Floating-point reduction instructions were a noted corner case because the VPU and Spike used different reduction algorithms permitted by the RVV specification, which could cause apparent mismatches. Functional Verification of a RISC-V Vector Accelerator