Reference Model

Concept

A reference model is an executable or software model used in simulation-based verification to predict expected behavior from inputs so that a DUT’s actual behavior can be compared against it. In the cited VPU verification environment, Spike served as a golden/reference model for most RISC-V vector instructions, while a separate C model was used for unordered floating-point reductions whose legal algorithm differed from Spike’s.

First seen 5/24/2026

Last seen 6/1/2026

Evidence 6 chunks

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WIKI

Reference Model

Definition

In simulation-based functional verification, a design's actual behavior is checked by simulating the HDL implementation, driving stimuli into it, and comparing the observed behavior with the expected behavior implied by the specification. In this context, a reference model is the software or executable model that predicts how the design should behave for a given input. In the VPU verification environment described in the evidence, the reference model accepts instructions as input and generates the expected results used to evaluate the VPU.

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NEIGHBORHOOD

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RELATIONSHIPS

8 connections

spike ← implements 99% 8e

Spike acts as the reference model in the verification environment, predicting expected instruction results.

Co-Simulation ← uses 97% 2e

Co-simulation relies on a reference model to compare results

Functional Verification of a RISC-V Vector Accelerator ← uses 97% 2e

The paper uses a reference model (Spike) to predict expected VPU behavior for comparison.

Genesys PE ← uses 100% 2e

Genesys PE uses a reference model to compute expected results for generated tests.

UVM scoreboard ← uses 99% 2e

The UVM scoreboard compares VPU results against those from the reference model.

Co-simulation ← uses 95% 1e

Co-simulation relies on a reference model to compare DUT outputs.

Simulation-based Functional Verification ← uses 90% 1e

In simulation-based verification, the behavior is verified by comparing to expected behavior from the specification.

Reduction Reference Model in C ← implements 97% 1e

The C reduction reference model implements a reference model for unordered reductions

LINKED ENTITIES

4 links

spike IMPLEMENTS Extracted graph relationship

Co-Simulation USES Extracted graph relationship

UVM scoreboard USES Extracted graph relationship

Reduction Reference Model in C IMPLEMENTS Extracted graph relationship

CITATIONS

6 sources

6 citations — click to expand

[1] Simulation-based functional verification checks actual HDL behavior by simulation and comparison with expected behavior implied by the specification. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[2] In the VPU environment, the reference model is software that predicts how the design should behave from inputs, accepting instructions and generating expected results. source

[3] A UVM scoreboard compares VPU results with reference-model results, including results obtained when instructions complete. source

[4] Spike had two roles in the environment: scalar-core execution/providing vector instructions to UVM in program order, and acting as a golden/reference model for DUT checking. source

[5] Spike was modified with SystemVerilog DPI-callable functions, simulation-resume behavior for vector instructions, memory-reading functions, and reduction-result forcing to support reference-model use. source

[6] For unordered floating-point reductions, a separate C reference model was created because Spike and the VPU used different RVV-legal reduction algorithms; matching results were injected back into Spike to avoid later divergence. source