CSR Testing — STIMSMITH

CSR Testing

Concept

CSR Testing is a processor-verification focus area for RISC-V Control and Status Registers. In the provided evidence, CSR-related checking appears in a coverage-guided fuzzing case study of VexRiscv configured for RV32IM, where the authors report many CSR bugs involving read-only CSR write attempts and erroneous exceptions on counter-CSR reads.

First seen 5/26/2026

Last seen 5/28/2026

Evidence 5 chunks

Wiki v2

WIKI

Overview

CSR Testing refers here to verification activity that exercises RISC-V Control and Status Register behavior and checks whether processor execution diverges from the expected behavior in a cross-level verification flow. In the cited coverage-guided fuzzing work, the evaluation configured VexRiscv for the RV32IM instruction subset and reported errors both in the decoder and in CSRs, with “many” errors associated with CSRs. [CSR bugs in RV32IM VexRiscv evaluation]

Role in coverage-guided fuzzing

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RELATIONSHIPS

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Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing ← uses 90% 2e

The paper includes CSR testing as part of the verification approach and Enhanced Havoc mutation includes CSR instruction support.

Enhanced Havoc Mutation ← uses 90% 1e

The Enhanced Havoc mutation includes CSR instruction insertion/replacement for CSR testing.

LINKED ENTITIES

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Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing USES Extracted graph relationship

CITATIONS

8 sources

8 citations — click to expand

[1] CSR bugs in RV32IM VexRiscv evaluation Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[2] Fuzzing mismatch detection and clustering Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[3] Enhanced AFL instruction mutations Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[4] ID CSR write-protection bug Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[5] Cycle counter CSR write-protection bug Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[6] Counter CSR read-access bug Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[7] Fuzzing results unique crashes Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

[8] CSR-focused test implications Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing