Technique
Technique
1259 entities#
1 single-instruction isolation
8 2 test program generation
8 3 Assertion-Based Verification
8 4 Squash (order-decoupled fusion)
8 5 Instruction Scheduling
8 6 Uniform Generation of SAT Witnesses
8 7 BDD-based Constraint Solving
8 8 Multi-Armed Bandit (MAB)
8 9 Random Test Program Generation
8 10 Fault Injection
7 11 constraint-based test case generation
7 12 Ant Colony Optimization
7 13 Model-based Stimuli Generation
7 14 Selective Symbolic Execution
7 15 Test Case Generation
7 16 Generation-Based Fuzzing
7 17 Memory Shadowing
7 18 SAT-based Bounded Model Checking
7 19 Visibility Warm-Up
7 20 Directed Test Generation
7 21 Differential Fuzz Testing
7 22 Random Program Loop Generation
7 23 SAT-based Stimuli Generation
7 24 Converged Branch Instruction Stream
7 25 Replay (lightweight debugging by event retransmission)
7 26 Glitch-aware leakage model
7 27 Multicore Parallelization
7 28 test suite generation pipeline
7 29 Test Case Shrinking
7 30 Error Injection
7 31 stream generation using abstract CSP
7 32 Stimulus Template
7 33 Integer Linear Programming (ILP) for Custom Instruction Synthesis
7 34 Functional Verification
7 35 Deep Reinforcement Learning
7 36 stimulus generation for CPU verification
7 37 Built-In Exception Handling Mechanism
7 38 Architecture Description
7 39 Program-to-Constraint Compilation
7 40 coverage-based fuzzing
7 41 instruction fuzzing
7 42 transformer language model for instruction sequences
7 43 Top-Down Stimulus Planning
7 44 Directed Test
7 45 Burch-Dill Correspondence Checking
7 46 Negative Testing
7 47 High-Level Synthesis
6 48 Object-Oriented Constraint Composition (OOP)
6 49 Fuzzing-Based Test Generation
6 50 Multi-target Coverage-based Greybox Fuzzing
6 51 Mux Coverage Instrumentation
6 52 Evolutionary Algorithm
6 53 decompositional model checking
6 54 Dependency Analysis
6 55 Randomized Instruction Generation
6 56 Burch and Dill Pipeline Verification Method
6 57 constrained random generation
6 58 Configuration Layer
6 59 Coverage-Guided Greybox Fuzzing
6 60 Random Test Generation
6 61 determinism anchors
6 62 Micro-Architectural State Reconstruction
6 63 Automated Failure Characterization
6 64 Global Class Restriction Mechanism
6 65 Pseudo-Random Testing
6 66 Group Relative Policy Optimization
6 67 multi-head self-attention
6 68 Presburger Arithmetic-based Symbolic Traversal
6 69 Hierarchical Aggregation and Decoding
6 70 Generic Simulation Method
6 71 Search-Based Software Testing
6 72 Code Injection
6 73 Template-Based Generation
6 74 SystemVerilog Testbench
6 75 Coverage-Guided Fuzz Testing
6 76 Checkpoint Restore Boot (CRB)
6 77 Instruction Morphing
6 78 stimulus generation
6 79 Register Allocation
6 80 Leapfrogging Heuristic
6 81 ISS Code Generation
6 82 REVERSI
6 83 coverage-guided mutation fuzzing
6 84 AI-Assisted Verification
6 85 Pipeline Modeling
6 86 Just-in-Time Compiled Simulation
6 87 Hardware-Software Co-Verification
6 88 Mapping Functions
6 89 Constraint-based Random Simulation
6 90 Cross-Level Testing
6 91 Reinforcement learning (RL)
6 92 Test Vector Leakage Assessment
6 93 AI-Driven Test Generation
5 94 Bit-Flipping Mutation
5 95 CPU-assisted test-case generation
5 96 Golden Reference Model Comparison
5 97 Sudoku Constraint Solving
5 98 control-flow anchors
5 99 Pseudo-Random Test Generation
5 100 Randomized Instruction Stream Generation
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