Skip to content
STIMSMITH
Technique

Technique

1157 entities
#
1
software fuzzing
8
2
Multi-Armed Bandit (MAB)
8
3
Coverage-Guided Test Generation
8
4
Fault Injection
7
5
constraint-based test case generation
7
6
instruction fuzzing
7
7
Selective Symbolic Execution
7
8
Ant Colony Optimization
7
9
Model-based Stimuli Generation
7
10
Test Case Generation
7
11
Generation-Based Fuzzing
7
12
transformer language model for instruction sequences
7
13
SAT-based Bounded Model Checking
7
14
Memory Shadowing
7
15
Differential Fuzz Testing
7
16
Program-to-Constraint Compilation
7
17
test suite generation pipeline
7
18
SAT-based Stimuli Generation
7
19
Negative Testing
7
20
Random Program Loop Generation
7
21
Replay (lightweight debugging by event retransmission)
7
22
Built-In Exception Handling Mechanism
7
23
Multicore Parallelization
7
24
Converged Branch Instruction Stream
7
25
stream generation using abstract CSP
7
26
Directed Test Generation
7
27
Visibility Warm-Up
7
28
Test Case Shrinking
7
29
Error Injection
7
30
Glitch-aware leakage model
7
31
Deep Reinforcement Learning
7
32
Stimulus Template
7
33
coverage-based fuzzing
7
34
stimulus generation for CPU verification
7
35
Integer Linear Programming (ILP) for Custom Instruction Synthesis
7
36
Functional Verification
7
37
BDD-based Constraint Solving
7
38
Top-Down Stimulus Planning
7
39
Directed Test
7
40
Burch-Dill Correspondence Checking
7
41
Architecture Description
7
42
Random Test Generation
6
43
Multi-target Coverage-based Greybox Fuzzing
6
44
Object-Oriented Constraint Composition (OOP)
6
45
High-Level Synthesis
6
46
Evolutionary Algorithm
6
47
Fuzzing-Based Test Generation
6
48
Dependency Analysis
6
49
Randomized Instruction Generation
6
50
Burch and Dill Pipeline Verification Method
6
51
determinism anchors
6
52
Coverage-Guided Greybox Fuzzing
6
53
Automated Failure Characterization
6
54
Mux Coverage Instrumentation
6
55
decompositional model checking
6
56
Cross-Level Testing
6
57
Pseudo-Random Testing
6
58
Group Relative Policy Optimization
6
59
Checkpoint Restore Boot (CRB)
6
60
Presburger Arithmetic-based Symbolic Traversal
6
61
Reinforcement learning (RL)
6
62
Hierarchical Aggregation and Decoding
6
63
Configuration Layer
6
64
Template-Based Generation
6
65
Generic Simulation Method
6
66
SystemVerilog Testbench
6
67
Coverage-Guided Fuzz Testing
6
68
Global Class Restriction Mechanism
6
69
Instruction Morphing
6
70
Register Allocation
6
71
coverage-guided mutation fuzzing
6
72
ISS Code Generation
6
73
Test Vector Leakage Assessment
6
74
Code Injection
6
75
REVERSI
6
76
Leapfrogging Heuristic
6
77
Hardware-Software Co-Verification
6
78
Search-Based Software Testing
6
79
Mapping Functions
6
80
Just-in-Time Compiled Simulation
6
81
Pipeline Modeling
6
82
Constraint-based Random Simulation
6
83
AI-Assisted Verification
6
84
Micro-Architectural State Reconstruction
6
85
Golden Reference Model Comparison
5
86
AI-Driven Test Generation
5
87
CPU-assisted test-case generation
5
88
Bit-Flipping Mutation
5
89
Automatic Test Pattern Generation
5
90
Pseudo-Random Test Generation
5
91
Dynamic Binary Instrumentation
5
92
Sudoku Constraint Solving
5
93
UniGen
5
94
Randomized Instruction Stream Generation
5
95
post-silicon fuzzing
5
96
Constraint Satisfaction Problem Solving
5
97
Training Derivation Strategy
5
98
multiplexer toggle coverage
5
99
Test Compaction
5
100
control-flow anchors
5
100 of 1157 shown
← prev page 2 of 12 next →