Directed Test

Technique

A directed test is a verification stimulus technique in which specific behavior is exercised using explicitly prepared stimulus, such as a pre-assembled processor program trace. In processor verification, directed tests are useful for targeted functionality and reuse of software-team tests, but they are often complemented by constrained-random and directed-random stimulus because creating traditional directed tests for all corner cases can be impractical.

First seen 5/28/2026

Last seen 6/1/2026

Evidence 6 chunks

Wiki v1

WIKI

Overview

A directed test is a targeted verification technique that uses explicitly prepared stimulus to exercise specific functionality. In the processor-verification flow described in the evidence, directed stimulus can be provided by loading a directed scenario from a file containing a pre-assembled program trace. This approach is useful for reusing directed tests produced by a processor software team and for covering specific processor functions.

Role in processor verification

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

5 connections

Scenario Generator ← uses 93% 1e

The scenario generator also works with directed test scenarios loaded from pre-assembled files.

Directed Random Stimulus ← uses 88% 1e

Directed random stimulus combines directed test elements with randomized components.

common instruction scenario base class ← uses 88% 1e

The common scenario class has a method to load directed scenarios from files.

Scenario Generator ← uses 88% 1e

The scenario generator supports directed scenarios as one of its stimulus types.

Constrained-Random Verification (CRV) ← compares with 88% 1e

CRV is proposed as an alternative to traditional directed tests whose creation time has become unreasonable.

LINKED ENTITIES

2 links

Scenario Generator USES Extracted graph relationship

Directed Random Stimulus USES Extracted graph relationship

CITATIONS

4 sources

4 citations — click to collapse

[1] Directed stimulus can be supplied by loading a directed scenario from a file containing a pre-assembled program trace, and this is useful for leveraging processor software-team tests. Applying constrained-random verification to microprocessors

[2] Directed scenarios are used to cover specific functionalities and can be implemented by reading a pre-assembled program. Applying constrained-random verification to microprocessors

[3] Traditional directed tests are insufficiently scalable for complex microprocessor verification because the number of corner cases makes test creation unreasonable. Applying constrained-random verification to microprocessors

[4] The methodology described in the evidence uses constrained-random, directed-random, and directed scenarios, and a scenario generator can work with these scenario types. Applying constrained-random verification to microprocessors