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STIMSMITH

Directed Random Stimulus

Concept

Directed random stimulus is a verification stimulus style used alongside constrained-random and fully directed scenarios. In processor verification, it steers random instruction streams toward hard-to-hit conditions—such as arithmetic rounding and overflow cases—by seeding or directing parts of the scenario with special values while still allowing randomized generation.

First seen 5/28/2026
Last seen 5/28/2026
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WIKI

Definition

Directed random stimulus is a stimulus-generation style that combines directed setup with randomized scenario generation. In the processor-verification example described by Chen, it is presented as a second scenario type alongside constrained-random scenarios and directed scenarios. Its purpose is to make hard-to-hit bug classes more likely than they would be under pure random stimulus alone. [1]

Use in processor verification

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RELATIONSHIPS

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Scenario Generator ← uses 95% 1e
The scenario generator works with directed random stimulus as one type of input.
Directed Test uses → 88% 1e
Directed random stimulus combines directed test elements with randomized components.

CITATIONS

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2 citations — click to collapse
[1] Directed random stimulus is a scenario style used alongside constrained-random and directed scenarios, and it targets hard-to-hit numerical cases such as rounding and overflow by using special values before randomized arithmetic instruction streams. Applying constrained-random verification to microprocessors
[2] A scenario generator can work with constrained-random, directed-random, and directed scenarios by randomly selecting and randomizing scenario objects until a user-specified condition is reached. Applying constrained-random verification to microprocessors