Cascade
ToolFirst seen 6/10/2026
Last seen 6/14/2026
Evidence 32 chunks
NEIGHBORHOOD
38 nodes · 78 edgesgraph · Cascade · depth=1
RELATIONSHIPS
44 connectionsCascade is used to evaluate the openC906 RTL.
Cascade is used to evaluate the openC910 RTL.
Cascade implements the asymmetric ISA pre-simulation technique for entangling control and data flows.
RISCover is compared to Cascade for bug-finding efficacy on open-source RISC-V cores.
Cascade is described as a state-of-the-art RISC-V RTL CPU fuzzer.
The paper presents and introduces Cascade as a new CPU fuzzer.
Cascade is compared against DifuzzRTL in coverage and performance evaluations.
Lyra is empirically compared against Cascade in coverage and throughput.
Cascade employs program generation for CPU fuzzing.
Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing ← compares with 100% 2e
The paper compares Lyra against Cascade in empirical evaluations.
Cascade evaluates control register coverage against DifuzzRTL.
Cascade evaluates multiplexer select coverage against RFUZZ.
Cascade evaluates simulator-based coverage in comparison with TheHuzz.
Cascade measures and reports program completion rates as a key metric.
Cascade measures and reports fuzzing instruction prevalence as a key metric.
Cascade analyzes dependency chain lengths in generated programs as a quality metric.
Cascade discovered a critical bug in the Yosys synthesizer.
Cascade generates programs with highly randomized and interdependent data and control flows.
Cascade implements an automated program reduction technique to find minimal bug-triggering programs.
Cascade uses intermediate program construction as a core step in generating ultimate programs.
Cascade generates valid RISC-V programs targeting the RISC-V ISA.
Cascade uses an ISS to execute intermediate programs and collect data-flow dependent values for constructing ultimate programs.
Cascade constructs programs as sequences of basic blocks.
Cascade handles cf-ambiguous instructions specially during program generation to control program flow.
Cascade relies on program non-termination as its bug detection mechanism.
Cascade generates programs supporting data flow-dependent privilege transitions.
Cascade supports complex FPU operations in generated programs.
Cascade generates programs that operate under randomized CSRs.
Cascade employs progressive and strong memory allocation strategies during program generation.
Cascade uses offset register construction to entangle data and control flows.
Cascade executes generated programs on RTL simulations of RISC-V CPUs.
Cascade uses Spike as the ISS for RISC-V program pre-simulation.
Cascade is evaluated on Rocket Core as one of the 6 RISC-V CPU targets.
Cascade is evaluated on BOOM as one of the 6 RISC-V CPU targets.
GoldenFuzz is benchmarked against Cascade for hardware coverage.
Cascade is compared against TheHuzz in coverage and performance evaluations.
Cascade is compared against RFUZZ in multiplexer select coverage evaluations.
Cascade uses Spike as an ISA simulator during fuzzing.
Cascade is evaluated on VexRiscv as one of the 6 RISC-V CPU targets.
Cascade is evaluated on PicoRV32 as one of the 6 RISC-V CPU targets.
Cascade is evaluated on Kronos as one of the 6 RISC-V CPU targets.
Cascade is a CPU fuzzer that implements CPU fuzzing techniques.
Cascade is evaluated on CVA6 as one of the 6 RISC-V CPU targets.
Cascade discovers bugs undetected by HypFuzz.