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STIMSMITH

Lyra

Tool
First seen 6/10/2026
Last seen 6/10/2026
Evidence 11 chunks

NEIGHBORHOOD

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RELATIONSHIPS

21 connections
Design Under Test uses → 100% 3e
Lyra executes and verifies the DUT on FPGA.
LyraGen uses → 100% 2e
Lyra uses LyraGen as its generative model for instruction generation.
Generative Model-Based Processor Fuzzing implements → 100% 2e
Lyra implements the generative model-based processor fuzzing approach.
FPGA-Accelerated Verification implements → 100% 2e
Lyra offloads verification to FPGA for hardware acceleration.
Differential Checking implements → 100% 2e
Lyra performs hardware-level differential checking between DUT and reference model.
Register Coverage Metric implements → 100% 2e
Lyra uses the register coverage metric for coverage collection on FPGA.
Instruction Legality Checking implements → 100% 2e
Lyra includes an instruction legality checker to validate generated instructions.
Instruction Address Correction implements → 100% 2e
Lyra includes an address correction module to prevent invalid memory accesses.
ENCORE uses → 95% 2e
Lyra's differential checking module is based on the ENCORE structure.
DiFuzzRTL ← compares with 100% 2e
Lyra is empirically compared against DifuzzRTL in coverage and throughput.
Cascade ← compares with 100% 2e
Lyra is empirically compared against Cascade in coverage and throughput.
The paper presents Lyra as its primary contribution.
coverage convergence uses → 95% 2e
Lyra targets accelerating coverage convergence as a key goal.
Stimulus Generation uses → 100% 2e
Lyra generates high-quality instruction stimuli using its generative model.
hardware fuzzing uses → 85% 2e
Lyra generates training data using hardware fuzzing as an initial stimulus.
Instruction Set Architecture uses → 95% 2e
Lyra exploits ISA semantics for instruction generation and verification.
Reference Model uses → 100% 2e
Lyra runs the reference model concurrently with the DUT for differential checking.
Rocket Core evaluates → 100% 1e
Lyra uses RocketCore as the DUT for all experiments.
RISC-V uses → 100% 1e
Lyra is a RISC-V verification framework.
RTL uses → 85% 1e
Lyra incorporates RTL-level coverage instrumentation methods.
Control and Status Register uses → 85% 1e
Lyra incorporates control register-based coverage instrumentation.