stimulus generation

Stimulus Generation

Technique

Stimulus generation is the production of inputs applied to a design under verification in simulation-based verification, including directed patterns, random inputs, and constrained-random stimuli governed by satisfaction problems. Evidence describes coverage-guided and constraint-satisfaction-based techniques that use feedback from simulation—such as functional coverage metrics—to drive generation, and highlights modern LLM-based approaches that optimize coverage via preference optimization.

First seen 5/26/2026

Last seen 9/24/2026

Evidence 6 chunks

Wiki v2

WIKI

Overview

In simulation-based hardware verification, stimulus generation refers to producing inputs that are applied to a design under test (DUT) so that the resulting behavior can be observed and checked against expectations. The cited evidence describes the prevailing approach as generating stimuli, applying those stimuli to the design, and using simulation-derived metrics to assess verification progress. In directed simulation, explicitly specified stimulus patterns written by verification engineers stimulate specific scenarios; random simulation instead generates random stimuli such as random addresses or data for bus communication. [C1][C2]

Forms of stimuli

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RELATIONSHIPS

5 connections

Automation of Processor Verification Using Recurrent Neural Networks ← uses 100% 2e

The paper employs stimulus generation to apply inputs to the processor under verification.

Constraint-based Random Simulation ← uses 98% 1e

Constraint-based random simulation generates stimuli via constraint solving.

CSP uses → 90% 1e

The stimulus generation approach is based on constraint satisfaction (CSP).

Address Translation evaluates → 92% 1e

Generated stimuli are used to test the address translation mechanism.

Test generation tools ← implements 74% 1e

Test generation tools implement techniques to generate test stimuli.

LINKED ENTITIES

3 links

CSP USES Extracted graph relationship

Address Translation EVALUATES Extracted graph relationship

Test generation tools IMPLEMENTS Extracted graph relationship

CITATIONS

9 sources

9 citations — click to expand

[1] Directed simulation applies explicitly specified stimulus patterns, while random simulation generates random stimuli such as random addresses or data, and over-constrained constraint sets can stall random stimulus generation. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)

[2] Stimuli may be represented as bit vectors applied to design input ports, programs loaded into program memory, random addresses/data for bus verification, or as testbenches (e.g., Verilog testbenches) in LLM-based flows. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)

[3] LLM-based stimulus generation represents stimuli as testbenches (e.g., Verilog testbenches) that drive the design under test. TB or Not TB: Coverage-Driven Direct Preference Optimization for Verilog Stimulus Generation

[4] Stimulus generation in constrained-random simulation relies on solving constraint satisfaction problems, including ATPG-based and word-level Boolean/decision-diagram constraint solvers and the SystemC Verification (SCV) library. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)

[5] A graph-based CSP (GCSP) framework was developed for stimulus generation in verifying hardware address translation; the translation process is modeled as a directed acyclic graph, each variable/constraint is linked to a node or edge, and the algorithm is based on conditional CSP. The technology was used to verify memory management units of several industrial microprocessors. Using Graph-Based CSP to Solve the Address Translation Problem (IBM Research, CP 2016)

[6] Coverage-driven stimulus generation alters the generator using coverage feedback; in a PRG-based approach, a recurrent neural network receives coverage feedback and dynamically alters the pseudorandom generator's constraints. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)

[7] Coverage-Driven Direct Preference Optimization (CD-DPO) integrates quantitative coverage feedback directly into the optimization objective, using the PairaNet dataset (derived from PyraNet) of paired high- and low-quality testbenches labeled with simulation-derived coverage metrics. On the CVDP CID12 benchmark the framework achieved up to 77.27% improvement in code coverage over open-source and commercial baselines. TB or Not TB: Coverage-Driven Direct Preference Optimization for Verilog Stimulus Generation

[8] An automatic contradiction-analysis technique reformulates the overall constraint, builds an abstraction, identifies self-contradictory and non-relevant constraints, and computes all minimal reasons for contradictions among remaining constraints; industrial experiments at the AMD Dresden Design Center demonstrated significant reduction in constraint contradiction debug time. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)

[9] On Codasip processors, coverage-guided stimulus generation reached coverage closure much sooner and enabled isolation of a small set of high-coverage stimuli for regression tests; the cited source states the techniques are widely applicable. Automatic Analysis of Constraint Contradictions in Constrained Random Simulation (FDL 2008)