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STIMSMITH

BOOM

Tool
First seen 6/2/2026
Last seen 9/1/2026
Evidence 61 chunks

NEIGHBORHOOD

5 nodes · 8 edges
graph · BOOM · depth=1

RELATIONSHIPS

24 connections
RISC-V ISA implements → 100% 9e
BOOM is a RISC-V processor implementing the RISC-V ISA.
RISC-V implements → 100% 7e
BOOM is a RISC-V out-of-order CPU implementation.
GoldenFuzz ← evaluates 100% 5e
GoldenFuzz was evaluated on the BOOM processor design, achieving superior coverage results.
GenHuzz ← evaluates 100% 4e
GenHuzz is evaluated on Boom, identifying new bugs and vulnerabilities.
Cascade ← evaluates 100% 3e
Cascade is evaluated on BOOM
PORTRUSH ← evaluates 99% 3e
PORTRUSH is evaluated on BOOM, a RISC-V CPU, to detect write port contention vulnerabilities.
ProcessorFuzz ← evaluates 100% 3e
ProcessorFuzz is evaluated using the BOOM out-of-order processor.
MorFuzz ← evaluates 100% 2e
MorFuzz was evaluated on the BOOM processor.
DejaVuzz ← evaluates 100% 2e
DejaVuzz is evaluated on the BOOM RISC-V out-of-order processor.
Chisel HDL uses → 100% 2e
BOOM is written in Chisel HDL.
Chisel HDL implements → 100% 2e
BOOM is designed in Chisel HDL.
The paper evaluates BOOM as a target CPU design for ENCARSIA.
DiFuzzRTL ← evaluates 95% 2e
DIFUZZRTL is evaluated on the BOOM processor.
WhisperFuzz ← evaluates 100% 2e
WhisperFuzz is evaluated on the BOOM processor, detecting new timing vulnerabilities.
The paper evaluates GoldenFuzz on the BOOM RISC-V processor.
FIRRTL uses → 80% 1e
BOOM processor is written in Chisel which compiles to FIRRTL.
Rocket Chip SoC Generator part of → 90% 1e
BOOM can also be generated from the Rocket Chip SoC Generator framework.
ProcessorFuzz ← evaluates 1e
The ProcessorFuzz paper evaluates the tool on the BOOM processor.
RISC-V uses → 100% 1e
BOOM is a RISC-V out-of-order processor using the RV64GC instruction set.
FireSim ← uses 100% 1e
FireSim supports BOOM-based SoCs.
Spectre-STC ← mentions 95% 1e
Spectre-STC is a known write port contention attack discovered on the BOOM CPU.
CHIA ← uses 98% 1e
CHIA implements ISA extensions in the BOOM RISC-V core.
DIVUW instruction mentions → 90% 1e
BOOM exhibits a timing vulnerability related to consecutive DIVUW and REM instructions.
Dromajo uses → 95% 1e
Dromajo has been integrated for use with BOOM.