BOOM

Tool

First seen 6/2/2026

Last seen 7/18/2026

Evidence 46 chunks

NEIGHBORHOOD

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19 connections

RISC-V ISA implements → 100% 8e

Boom is an open-source RISC-V processor core implementing the RISC-V ISA.

RISC-V implements → 100% 7e

BOOM is a RISC-V out-of-order CPU implementation.

GoldenFuzz ← evaluates 100% 5e

GoldenFuzz was evaluated on the BOOM processor design, achieving superior coverage results.

PORTRUSH ← evaluates 99% 3e

PORTRUSH is evaluated on BOOM, a RISC-V CPU, to detect write port contention vulnerabilities.

Cascade ← evaluates 100% 3e

Cascade is evaluated on BOOM

ProcessorFuzz ← evaluates 100% 3e

ProcessorFuzz is evaluated using the BOOM out-of-order processor.

MorFuzz ← evaluates 100% 2e

MorFuzz was evaluated on the BOOM processor.

Chisel HDL uses → 100% 2e

BOOM is written in Chisel HDL.

DiFuzzRTL ← evaluates 95% 2e

DIFUZZRTL is evaluated on the BOOM processor.

Chisel HDL implements → 100% 2e

BOOM is designed in Chisel HDL.

DejaVuzz ← evaluates 100% 2e

DejaVuzz is evaluated on the BOOM RISC-V out-of-order processor.

The paper evaluates BOOM as a target CPU design for ENCARSIA.

GenHuzz ← evaluates 100% 2e

GenHuzz is evaluated on the Boom RISC-V core for coverage and vulnerability detection.

RISC-V uses → 100% 1e

BOOM is a RISC-V out-of-order processor using the RV64GC instruction set.

FIRRTL uses → 80% 1e

BOOM processor is written in Chisel which compiles to FIRRTL.

ProcessorFuzz ← evaluates 1e

The ProcessorFuzz paper evaluates the tool on the BOOM processor.

BOOM can also be generated from the Rocket Chip SoC Generator framework.

Spectre-STC ← mentions 95% 1e

Spectre-STC is a known write port contention attack discovered on the BOOM CPU.

The paper evaluates GoldenFuzz on the BOOM RISC-V processor.