VCS
ToolVCS is identified in the evidence as a simulator used in RISC-V verification flows. It can execute constrained-random programs, replay failing cases deterministically, and participate in flows where ImperasDV provides lock-step reference-model comparison and Verdi provides debug and coverage analysis.
First seen 5/25/2026
Last seen 5/26/2026
Evidence 3 chunks
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Overview
VCS is used as a simulation environment in RISC-V verification flows. The evidence describes constrained-random programs being executed in simulators such as VCS, with Verdi used for centralized debug.[C1]
Role in RISC-V verification
NEIGHBORHOOD
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5 connectionsVCS executes STING-generated random tests as part of the verification flow.
The hybrid methodology uses VCS for RTL simulation and deterministic replay of failing cases.
VCS executes ImperasTS directed suites as part of the verification flow.
VCS is a high-performance RTL simulation platform that executes tests against RTL.
Verdi and VCS are used together in the hybrid flow; results are merged in Verdi and failing cases are replayed in VCS.
LINKED ENTITIES
1 linksCITATIONS
4 sources4 citations — click to collapse
[1] VCS is used as a simulator for executing constrained-random programs in RISC-V verification flows, with Verdi providing centralized debug. source
[2] A described coverage-closure flow uses ImperasFC for functional coverage analysis, merges results in Verdi, and replays failing cases deterministically in VCS. source
[3] The evidence describes the ImperasDV reference model integrated with Verdi for unified coverage analysis in VCS. source
[4] ImperasDV enables lock-step comparison against a reference model and catches errors at instruction retirement. source