Skip to content
STIMSMITH

Performance of a SystemVerilog Sudoku Solver with VCS

Paper
First seen 7/14/2026
Last seen 7/14/2026
Evidence 10 chunks

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

24 connections
Object-Oriented Constraint Composition (OOP) compares with → 100% 2e
The paper compares OOP and FLAT constraint composition approaches.
Conjunctive Normal Form (CNF) mentions → 100% 2e
The paper discusses CNF as the formula structure used by the constraint solver.
Latin Square mentions → 100% 2e
The paper mentions Latin square as the mathematical model underlying Sudoku.
Parasitic Literals mentions → 100% 2e
The paper discusses parasitic literals as a side effect of the implication operator in constraints.
Implication Operator in Constraints mentions → 100% 2e
The paper discusses the implication operator and its effect on parasitic literals in constraints.
If-Else Constraint Construct mentions → 100% 2e
The paper investigates whether using if-else instead of implication improves solver efficiency.
Constant vs Variable in Constraint mentions → 100% 2e
The paper investigates whether using constants instead of variables in constraints improves solver efficiency.
VCS evaluates → 100% 2e
The paper evaluates the VCS constraint solver's performance on Sudoku puzzles.
MathSAT5 evaluates → 100% 2e
The paper evaluates MathSAT5 as a public domain SAT solver and compares it against VCS.
Yices evaluates → 100% 2e
The paper evaluates Yices as a public domain SAT solver and compares it against VCS.
Z3 evaluates → 100% 2e
The paper evaluates Z3 as a public domain SAT solver and compares it against VCS.
Sudoku Constraint Solving uses → 100% 2e
The paper uses Sudoku constraint solving as a benchmark methodology.
The paper uses OOP constraint composition as one of the test bench approaches.
Flat Constraint Composition (FLAT) uses → 100% 2e
The paper uses flat constraint composition as one of the test bench approaches.
Clausal Reduction Optimization uses → 90% 2e
The paper uses clausal reduction optimization techniques and evaluates their effect on solver performance.
SystemVerilog uses → 100% 2e
The paper uses SystemVerilog as the hardware verification language for the test bench.
Perl uses → 100% 2e
The paper uses Perl for post-processing verification scripts and to generate flat game board test benches.
Sudoku Solver SystemVerilog Test Bench uses → 100% 2e
The paper uses the SystemVerilog Sudoku solver test bench as its primary experimental artifact.
Avago Technologies authored by → 95% 1e
Jeremy Ridgeway is affiliated with Avago Technologies, the organization associated with this paper.
Satisfiability Modulo Theories (SMT) mentions → 100% 1e
The paper mentions SMT as a technique used in conjunction with SAT by constraint solvers.
SMT2 Constraint Language Input uses → 95% 1e
The paper translates constraints to SMT2 format to use with public domain SAT solvers.
Constrained Random Verification mentions → 100% 1e
The paper discusses constrained random verification as the motivation for efficient constraint solving.
Jeremy Ridgeway authored by → 100% 1e
The paper is authored by Jeremy Ridgeway.
SAT Solving mentions → 100% 1e
The paper mentions SAT solving as a technique employed by constraint solvers.