Test Program Generation for Functional Verification of PowerPC Processors in IBM

Paper

“Test Program Generation for Functional Verification of PowerPC Processors in IBM” is a 1995 paper by Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek. The available evidence identifies it as a Design Automation Conference paper on test program generation for functional verification of IBM PowerPC processors.

First seen 5/26/2026

Last seen 5/26/2026

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Overview

“Test Program Generation for Functional Verification of PowerPC Processors in IBM” is a paper on test program generation for functional verification of PowerPC processors at IBM. The cited bibliographic entry lists the authors as Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek and gives the publication year as 1995.

Bibliographic details

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RELATIONSHIPS

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PowerPC Processor Verification mentions → 100% 2e

The paper is specifically about test program generation for PowerPC processor verification.

LINKED ENTITIES

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Constraint-based Random Stimuli Generation for Hardware Verification cited_by_source_context The provided evidence is from an AAAI PDF titled as a constraint-based random stimuli generation paper, whose reference list includes the 1995 PowerPC test program generation paper.

CITATIONS

5 sources

5 citations — click to expand

[1] The paper is titled “Test program generation for functional verification of PowerPC processors in IBM.” [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[2] The cited authors are Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[3] The bibliographic entry gives the publication year as 1995. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[4] The paper appeared in the 32nd Design Automation Conference (DAC95), pages 279–285. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[5] The available source summarizes IBM random stimuli generation for hardware verification as a complex AI-based application and says research continued into CSP and knowledge-representation techniques. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI