sequence testing

Concept

Sequence testing is a testing approach in which system behavior is specified and checked over sequences of inputs, outputs, and state transitions rather than only a single operation. In the provided evidence, sequence-test-oriented generation is contrasted with unit-test-oriented generation, modeled using state-exception monads in HOL-TestGen, and applied to processor conformance testing over instruction sequences.

First seen 5/25/2026

Last seen 5/26/2026

Evidence 5 chunks

Wiki v1

WIKI

Definition

Sequence testing is a testing approach in which tests describe sequences of state transitions that a system may perform. In contrast to unit-test-oriented generation, which uses preconditions and postconditions of individual system operations, sequence-test-oriented approaches use temporal specifications or automata-based specifications of system behavior. In processor test-program generation, the processor state is an important part of the test description, and tests describe sequences of state transitions caused by executing program instructions.

Relation to unit testing

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

2 connections

Test Program Generation for a Microprocessor: A Case-Study ← uses 100% 2e

The paper applies sequence testing to test sequences of instructions.

state-space explosion ← part of 90% 1e

Sequence testing is susceptible to state-space explosion.

LINKED ENTITIES

2 links

state-exception monad USES Extracted graph relationship

unit testing SPECIALIZATION_OF Extracted graph relationship

CITATIONS

11 sources

11 citations — click to expand

[1] Sequence-test-oriented approaches use temporal specifications or automata-based specifications of system behavior, whereas unit-test-oriented methods use preconditions and postconditions of operation specifications. Test Program Generation for a Microprocessor: A Case Study

[2] In processor test-program generation, sequence tests describe sequences of state transitions that the processor may perform while executing program instructions. Test Program Generation for a Microprocessor: A Case Study

[3] A sequence testing scenario requires control of internal-state initialization and sometimes reference to the final state; the test result is inferred from a sequence of system inputs and observed outputs. Test Program Generation for a Microprocessor: A Case Study

[4] Unit testing is described as a special one-step form of sequence testing where the output state is more or less completely accessible for the test. Test Program Generation for a Microprocessor: A Case Study

[5] HOL-TestGen supports sequence test specifications using the state-exception monad, modeling partial state-transition functions of type σ ⇀ (o × σ). Test Program Generation for a Microprocessor: A Case Study

[6] Programs under test can be modeled as input/output stepping functions that may fail for a given state and input or produce an output and successor state. Test Program Generation for a Microprocessor: A Case Study

[7] HOL-TestGen uses mbind to feed a list of inputs successively into the system under test and stop when an error occurs; this is its standard way to represent sequence test specifications. Test Program Generation for a Microprocessor: A Case Study

[8] When a postcondition depends explicitly on the state, the evidence uses assertSE rather than return(P). Test Program Generation for a Microprocessor: A Case Study

[9] The evidence distinguishes sequence-test scenarios based on local-step observations from scenarios based on testing the final state; in the VAMP application, final-state checks were the relevant class. Test Program Generation for a Microprocessor: A Case Study

[10] In the VAMP case study, sequence testing was used to test instruction sequences up to a given length, with instruction subsets including load/store, arithmetic, logic, and control-flow operations. Test Program Generation for a Microprocessor: A Case Study

[11] Preconditions, also called test purposes, are added to test specifications to restrict generated instruction sequences to a selected subset. Test Program Generation for a Microprocessor: A Case Study