Skip to content
STIMSMITH

Burkhart Wolff

Person

Burkhart Wolff is identified in the provided evidence as a co-author of the 2013 technical paper “Test Program Generation for a Microprocessor: A Case-Study” and as affiliated with Univ. Paris-Sud, Laboratoire LRI, UMR8623 in Orsay, France.

First seen 5/25/2026
Last seen 6/8/2026
Evidence 3 chunks
Wiki v1

WIKI

Overview

Burkhart Wolff is listed as one of the authors of the paper “Test Program Generation for a Microprocessor: A Case-Study”, alongside Achim D. Brucker, Abderrahmane Feliachi, and Yakoub Nemouchi. In the paper metadata, Wolff is associated with Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, France; the same author block also lists CNRS, Orsay, France, for the group of authors using LRI email addresses. [C1]

Research context in the provided evidence

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

2 connections
The paper is authored by Burkhart Wolff.
Université Paris-Sud part of → 100% 1e
Burkhart Wolff is affiliated with Université Paris-Sud.

CITATIONS

6 sources
6 citations — click to expand
[1] Burkhart Wolff is listed as a co-author of “Test Program Generation for a Microprocessor: A Case-Study” and associated with Univ. Paris-Sud, Laboratoire LRI, UMR8623. Test Program Generation for a Microprocessor: A Case Study
[2] The paper frames microprocessor testing as part of certification for critical security or safety properties, including higher assurance levels such as Common Criteria EAL 7. Test Program Generation for a Microprocessor: A Case Study
[3] The paper presents a case study that uses a formal model of a microprocessor to generate test programs validating instruction-set correctness. Test Program Generation for a Microprocessor: A Case Study
[4] The case study uses an existing Isabelle/HOL model and HOL-TestGen, a model-based testing environment extending Isabelle/HOL. Test Program Generation for a Microprocessor: A Case Study
[5] The paper reports conformance test scenarios where processor models synthesize test programs run against real hardware in the loop. Test Program Generation for a Microprocessor: A Case Study
[6] The publication metadata identifies the paper as part of TAP 2013, LNCS 7942, pages 76–95, published in 2013 by Springer-Verlag as an author’s version. Test Program Generation for a Microprocessor: A Case Study