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STIMSMITH
Concept

Concept

4823 entities
#
1
false positive detection
2
2
Load-Reserved Store-Conditional
2
3
rv64i
2
4
Variable Scoping
2
5
Architectural Testing
2
6
Path Selection in FSM
2
7
assembly program test inputs
2
8
tb_csr.vcd
2
9
tb_csr.v
2
10
Trap handling flow
2
11
instruction dependencies
2
12
Power9
2
13
Intermediate Code Representation
2
14
Data Footprint
2
15
Temporal Locality
2
16
RPU
2
17
Register Transition Function
2
18
test situations
2
19
Combinational Function
2
20
Depth-First Search
2
21
Hazard3
2
22
StarCoder2
2
23
Board Support Package
2
24
Near-Memory Processing
2
25
offset applier instruction
2
26
FISSC Benchmark
2
27
test action
2
28
Test Program Generation for Memory Management Units of Microprocessors
2
29
RISC-V Timer
2
30
Lockstep Core
2
31
Selective Testing
2
32
Program Counter Monitoring
2
33
AHB-to-Wishbone Adapter
2
34
Test Program Generation for Microprocessors
2
35
Laser Fault Injection
2
36
TLB memory management
2
37
VCD Waveform Trace
2
38
Coverage-Guided Testing
2
39
Prefetch Buffer
2
40
Trace Merging
2
41
Speculative Fetch
2
42
Synchronous Digital Circuit
2
43
HDL Code Generation
2
44
Register File Write Port Monitoring
2
45
Magic Instruction
2
46
write_reg macro
2
47
equivalence classes of instructions
2
48
Fetch Interface Monitoring
2
49
SoC integration verification
2
50
gen_program
2
51
Hardware Behavior Coverage
2
52
template parameter iterators
2
53
MINRES The Good Core (TGC)
2
54
Bit-flip Fault Effect
2
55
Top of Range (TOR)
2
56
YAML Configuration
2
57
Instruction Set Generator (ISG)
2
58
Hardware-software leakage contracts
2
59
Bayesian Network Coverage-directed Test Generation
2
60
Genetic Programming
2
61
Spike ISS
2
62
FPGA-based rapid prototyping
2
63
Single Group Mapping
2
64
Dynamic Bin Mapping
2
65
Core-UVM environment
2
66
executable semantics
2
67
Vengine
2
68
RVFI Stream
2
69
DII Stream
2
70
DMA interface verification
2
71
JTAG interface verification
2
72
flip-flop
2
73
CSRRW
2
74
Trace Log File Comparison
2
75
GPU instruction set
2
76
Bias Statements in Test Templates
2
77
Jupyter notebooks
2
78
assembly test program generation
2
79
Execution Runner
2
80
bounded load/store operations
2
81
vector memory instructions
2
82
concretize hint
2
83
pipeline interlocks
2
84
DFI Verification Flow
2
85
Pre-Silicon Software Development
2
86
RISC-V Foundation
2
87
Constraint Solving for Test Generation
2
88
register dependencies
2
89
Test-Case Template
2
90
ALU Constraint Verification
2
91
CSR interactions
2
92
CISC CPU
2
93
bfloat16
2
94
Program Input Generation
2
95
CoreIR
2
96
RV32I Base Integer ISA
2
97
many-sorted logic
2
98
Design Instrumentation
2
99
Simulation-based Equivalence Checking
2
100
algebraic data type
2
100 of 4823 shown
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