Bit-flip Fault Effect

Concept

In the µArchiFI microarchitectural fault injection framework, a bit-flip is one of the possible register-level fault effects E within the formal fault model (L, T, E) used to describe an attacker's perturbation of a hardware transition system. It replaces a register's normal update transition with a faulty transition that flips one or more bits of the next-state value while remaining in the same data domain, and is the natural modeling choice for spatially and temporally precise attacks such as laser fault injection.

First seen 7/6/2026

Last seen 7/6/2026

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Wiki v1

WIKI

Bit-flip Fault Effect

In the µArchiFI framework for formal modeling and verification of microarchitectural fault injections (Tollec et al., 2023), the bit-flip fault effect is one of the concrete values that the fault-effect set E ⊂ {set, reset, flips, …} can take when instantiating the fault model (L, T, E) of an attacker.

Role in the Fault Model

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Attacker Model ← uses 90% 1e

The attacker model can use bit-flip fault effects to model precise injections like laser fault injection.

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CITATIONS

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[1] The fault effect E ⊂ {set, reset, flips, …} is a set of functions that modifies how a register is updated in the next state, with a fault e ∈ E replacing the transition function δr_j with the faulty transition δe_j within the same data domain. µArchiFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections

[2] The fault model is parametrized by the triplet (L, T, E), where L is the set of possible fault locations (registers targeted), T is the timing range, and E is the set of possible fault effects on the system. µArchiFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections

[3] Laser fault injections are accurate in space and time and are modeled with only one or two bit-flip effects, while voltage or clock glitches are modeled with multiple bit-set and bit-reset effects. µArchiFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections

[4] For each targeted register rl in L, a new input xl is added to control the fault injection; rl' equals the faulty transition δe_l(s) when xl = False and the normal transition δr_l(s) when xl = True. µArchiFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections