Data Footprint

Concept

Data footprint is a workload characterization metric that quantifies the range of data addresses accessed by an application during its execution. It is a key determinant of cache and memory hierarchy performance because the size of the data footprint relative to each cache level governs hit and miss behavior, and it is used as a controllable knob in synthetic workload generators such as Genesys and as an optimization target in compiler tiling and accelerator design.

First seen 6/13/2026

Last seen 6/13/2026

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Data Footprint

Definition

Data footprint is defined as the range of data addresses accessed by an application during its execution time. As stated in the Genesys workload-generation framework, "Data footprint metric determines the range of data addresses accessed by the synthetic application during its execution time" [Genesys, chunk 7f53489b-7dd4-4b1a-a498-8e612b643e55]. In Genesys the metric is treated as a single scalar workload knob (metric 8 in the framework's memory-access characteristics) that "controls the size of the memory regions, which are accessed by the synthetic application" [Genesys, chunk 7f53489b-7dd4-4b1a-a498-8e612b643e55; 96e74d1d-5a60-48ef-8449-695d1fecd929].

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NEIGHBORHOOD

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graph · Data Footprint · depth=1

RELATIONSHIPS

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Genesys ← uses 100% 2e

Genesys uses data footprint to control the range of data addresses accessed.

LINKED ENTITIES

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Genesys USES Extracted graph relationship

CITATIONS

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[1] Data footprint metric determines the range of data addresses accessed by the synthetic application during its execution time, and it controls the size of the memory regions accessed by the synthetic application. Genesys: Automatically Generating Representative Workloads

[2] Data footprint determines performance of different levels of caches and memory based on how large the footprint is with respect to the available cache size and memory structure. Genesys: Automatically Generating Representative Workloads

[3] Data footprint is listed as metric 8 in Genesys's memory-access characteristics group, alongside regular/irregular behavior, spatial-locality stride bins, temporal-locality bins, and L1/L2 data-cache miss rates. Genesys: Automatically Generating Representative Workloads

[4] In the generated code, the inner loop of a two-level nested loop controls the application's data footprint and the outer loop controls the number of dynamic instructions; every static load or store instruction resets to the first element. Genesys: Automatically Generating Representative Workloads

[5] Miss ratio scaling captures the relationship between data access latency and working set size, with sharp increases in latency indicating the data footprint exceeds a cache level's capacity; loop nestings are tiled based on the derived memory hierarchy and the observed data footprint per iteration. Latency Based Tiling

[6] Conventional FHE constructions are major sources of excessive working sets; fine-grained coefficient-to-slot transformation, plaintext compression, and intermediate modulus raising reduce the on-chip data footprint by minimizing temporary ciphertexts and plaintext loads. WHET: Welding Homomorphic Encryption to Accelerator Architectures