LiFU
ToolFirst seen 8/5/2026
Last seen 8/5/2026
Evidence 15 chunks
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50 connectionsLiFU is compared against ProcessorFuzz in the evaluation.
LiFU ingests RTL design hierarchy and runs RTL simulation.
LiFU uses a Weight Cache to dynamically score and prioritise seeds.
LiFU generates instruction sequences with dependency chains to trigger micro-architectural hazards.
LiFU synthesises assembly instruction sequences using LLMs.
LiFU involves human experts in mismatch triage and annotation.
LiFU detects mismatches between DUT and ISS outputs.
LiFU filters out non-progressing testcases to avoid wasted RTL simulation cycles.
LiFU aims to achieve high instruction diversity to cover the micro-architectural state space.
LiFU detects and avoids poisonous interactions between fuzzer combinations.
LiFU measures and improves FSM coverage on CPU designs.
LiFU measures and improves line coverage on CPU designs.
LiFU measures and improves condition coverage on CPU designs.
LiFU integrates formal verification via VC Formal for property proving.
LiFU uses feedback-driven coordination to steer fuzzers in real time.
LiFU synthesises SVA properties via LLM for uncovered coverpoints.
LiFU is designed to trigger pipeline hazards through directed mutation.
LiFU uses Spike ISS as a golden oracle for differential testing.
LiFU filters non-progressing testcases via ISS pre-runs.
LiFU performs reachability analysis on uncovered RTL coverpoints.
LiFU adopts Cascade for seed mutation as part of its ensemble.
LiFU generates SVA properties for hard-to-reach coverpoints using LLMs.
LiFU leverages LLMs for generative mutation and property generation.
LiFU maintains and queries a knowledge base to ground LLM prompts.
LiFU uses coverage feedback to steer mutation and seed selection.
LiFU maintains and evolves a seed corpus throughout the fuzzing campaign.
LiFU is evaluated on the RocketChip RISC-V processor core.
LiFU is evaluated on the BOOM out-of-order RISC-V core.
LiFU performs differential checking against ISS golden traces.
LiFU adopts a pipelined design to maximise testcase throughput.
LiFU orchestrates multiple fuzzers as an ensemble.
LiFU is compared against Cascade in the evaluation.
LiFU is designed to expose data forwarding hazards in processor pipelines.
LiFU implements smart coordination among multiple fuzzers.
LiFU uses semantic seed triage to augment its coordination.
LiFU uses LLM-powered generative mutation targeting micro-architectural gaps.
LiFU adopts an asymmetric simulation strategy decoupling ISS from RTL execution.
LiFU uses coverage feedback to guide fuzzing.
LiFU adapts seed scoring coefficients via multi-armed bandit online feedback.
LiFU uses VC Formal for formal verification of LLM-generated properties.
LiFU uses GPT-4-turbo via OpenAI API for assembly synthesis.
LiFU adopts ProcessorFuzz for seed mutation as part of its ensemble.
LiFU is compared against DifuzzRTL in the evaluation.
LiFU is compared against ChatFuzz in the evaluation.
LiFU is compared against GenHuzz in the evaluation.
LiFU is applied to RISC-V processor cores.
LiFU includes Algorithm 1 for filtering non-progressing testcases.
LiFU includes Algorithm 2 for reachability analysis of uncovered coverpoints.
LiFU includes Algorithm 3 for LLM-guided property generation.
LiFU is a CPU fuzzing framework.