Towards specification and testing of RISC-V ISA compliance

Paper

“Towards specification and testing of RISC-V ISA compliance” is a DATE 2020 paper by Vladimir Herdt, Daniel Große, and Rolf Drechsler. The available evidence identifies it as work on RISC-V ISA compliance specification and testing and shows that it is cited by the RISC-V processor-verification paper “Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study.”

First seen 5/30/2026

Last seen 5/30/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

“Towards specification and testing of RISC-V ISA compliance” is a paper by Vladimir Herdt, Daniel Große, and Rolf Drechsler, published in DATE 2020. The title identifies the paper’s focus as the specification and testing of compliance with the RISC-V instruction set architecture (ISA).

Bibliographic context

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NEIGHBORHOOD

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RELATIONSHIPS

4 connections

Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study ← mentions 90% 1e

The paper cites work on RISC-V ISA compliance testing.

Vladimir Herdt authored by → 95% 1e

Vladimir Herdt is an author of the RISC-V compliance testing paper.

Daniel Große authored by → 95% 1e

Daniel Große is an author of the RISC-V compliance testing paper.

Rolf Drechsler authored by → 95% 1e

Rolf Drechsler is an author of the RISC-V compliance testing paper.

LINKED ENTITIES

4 links

Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study MENTIONS Extracted graph relationship

Vladimir Herdt AUTHORED_BY Extracted graph relationship

Daniel Große AUTHORED_BY Extracted graph relationship

Rolf Drechsler AUTHORED_BY Extracted graph relationship

CITATIONS

2 sources

2 citations — click to collapse

[1] The paper is titled “Towards specification and testing of RISC-V ISA compliance,” was published in DATE 2020, and is authored by V. Herdt, D. Große, and R. Drechsler. Efficient Cross-Level Testing for

[2] “Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study” cites “Towards specification and testing of RISC-V ISA compliance” in its references. Efficient Cross-Level Testing for