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Coverage-guided Aging

Concept

Coverage-guided Aging is a processor-verification concept used in cross-level co-simulation to guide endless randomized instruction stream generation over time. In the DATE 2022 approach, a Coverage-Observer measures functional coverage from the ISS execution state, performs coverage aging, and sends hints to an Instruction-Injector when functionality should be covered again.

First seen 5/29/2026
Last seen 6/5/2026
Evidence 7 chunks
Wiki v1

WIKI

Overview

Coverage-guided Aging is a coverage-driven technique for cross-level processor verification based on endless randomized instruction stream generation. The approach uses functional coverage feedback to guide test generation over time rather than relying only on unconstrained randomized instruction streams.

In the described cross-level setup, separate random instruction generators are initialized with the same cryptographic seeds for each core, causing them to provide the same endless randomized instruction stream. The instruction-set simulator (ISS) first executes part of the stream, while the RTL processor later fetches its stream through a core adapter that accounts for micro-architectural effects such as pipelining, prefetching, and fetch buffering.

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RELATIONSHIPS

15 connections
The paper introduces Coverage-guided Aging as a key contribution to smooth coverage distribution.
Functional Coverage uses → 100% 6e
Coverage-guided Aging uses functional coverage to smooth distribution
Cross-Level Processor Verification ← uses 100% 5e
The cross-level processor verification approach uses coverage-guided aging.
Coverage-Observer ← implements 100% 4e
Coverage-Observer implements the coverage-guided aging mechanism.
Coverage-Observer ← implements 100% 3e
The Coverage-Observer is described as the heart of the coverage aging extension.
Instruction-Injector ← uses 100% 3e
Instruction-Injector uses hints from Coverage-Observer to inject instructions
coverage-guided test generation extends → 90% 2e
Coverage-guided Aging extends coverage-guided test generation by smoothing the coverage distribution over time.
Coverage-Observer ← uses 100% 2e
Coverage-Observer implements coverage-guided aging
Coverage-guided Aging Counter uses → 100% 2e
Coverage-guided aging uses aging counters to track and adjust coverage.
Coverage-guided Aging extends randomized instruction stream generation.
Coverage-guided Aging Counter ← implements 100% 2e
The Coverage-guided Aging Counter is the implementation mechanism for Coverage-guided Aging.
Machine Learning for Test Generation compares with → 75% 1e
Machine learning for test generation is mentioned as an alternative approach compared to coverage-guided aging.
Instruction Injection uses → 90% 1e
Coverage-guided aging uses instruction injection to cover underrepresented functionality.
Symbolic Execution compares with → 75% 1e
Symbolic execution is mentioned as an alternative approach to the paper's coverage-guided aging approach.
Coverage-guided Aging Counter uses → 100% 1e
Coverage-guided Aging is implemented using aging counters that are decremented over time.

CITATIONS

8 sources
8 citations — click to expand
[1] Coverage-guided Aging is used in a cross-level processor verification approach based on endless randomized instruction stream generation. Cross-Level Processor Verification via
[2] Random instruction generators for each core are initialized with the same cryptographic seeds so they provide the same endless randomized instruction stream. Cross-Level Processor Verification via
[3] The RTL-side fetch path must account for micro-architectural details such as pipelining, prefetching, and fetch buffering. Cross-Level Processor Verification via
[4] The Coverage-Observer measures functional coverage based on the ISS execution state, performs coverage aging, and gives hints to the Instruction-Injector when functionality should be covered again. Cross-Level Processor Verification via
[5] Functional coverage can be specified with arbitrary complexity and is used to guide test generation over time. Cross-Level Processor Verification via
[6] In the described work, coverage points are defined as the cross-product of instruction groups. Cross-Level Processor Verification via
[7] The Instruction-Injector evaluates coverage hints and injects instructions to cover requested functionality. Cross-Level Processor Verification via
[8] The authors report achieving a more regular coverage distribution via Coverage-guided Aging and finding an intricate microarchitecture-related bug. Cross-Level Processor Verification via