Skip to content
STIMSMITH

Coverage-Observer

Tool

Coverage-Observer is a runtime component in a cross-level processor verification setup for randomized, coverage-guided instruction-stream generation. It samples executed instructions, maps them to coverage points, and drives Coverage-guided Aging by updating counters and hinting the Instruction-Injector when coverage points have aged.

First seen 5/29/2026
Last seen 6/2/2026
Evidence 3 chunks
Wiki v1

WIKI

Overview

Coverage-Observer is a component in the cross-level processor verification approach described in Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging. The approach generates endless unrestricted instruction streams, co-simulates an RTL core with an Instruction Set Simulator (ISS), and continuously updates coverage information based on the ISS execution state.

Within this setup, the Coverage-Observer monitors executed instructions at runtime. It samples the executed instructions and looks up the matching coverage points. The paper describes it as the "heart" of the coverage-aging extension because it connects runtime coverage observation to the generation guidance mechanism.

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

9 connections
The paper uses Coverage-Observer to measure functional coverage and perform coverage aging.
Coverage-guided Aging implements → 100% 4e
Coverage-Observer implements the coverage-guided aging mechanism.
Functional Coverage implements → 100% 3e
Coverage-Observer measures functional coverage based on ISS execution state.
Functional Coverage uses → 100% 2e
Coverage-Observer measures functional coverage based on ISS execution state
Instruction Set Simulator (ISS) uses → 100% 2e
Coverage-Observer observes ISS execution state for coverage
Coverage-guided Aging uses → 100% 2e
Coverage-Observer implements coverage-guided aging
Coverage-guided Aging Counter uses → 100% 1e
Coverage-Observer uses aging counters to track coverage
Coverage-guided Aging Counter implements → 100% 1e
Coverage-Observer sets and decrements Coverage-guided Aging counters.
Cross-product Coverage Points uses → 100% 1e
Coverage-Observer uses cross-product of instruction groups as coverage points.

CITATIONS

7 sources
7 citations — click to expand
[1] Coverage-Observer is part of a cross-level verification approach that generates endless unrestricted instruction streams and uses ISS/RTL co-simulation with runtime coverage feedback. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[2] Coverage information is continuously updated based on the execution state of the ISS. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[3] Coverage-Observer samples executed instructions, looks up matching coverage points, watches executed instructions at runtime, and is described as the heart of the coverage-aging extension. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[4] The implementation defines coverage points as the cross-product of instruction groups defined by a verification engineer. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[5] Coverage-Observer sets aging counters when a coverage point is covered, periodically decreases them, sends hints to the Instruction-Injector at the minimum limit, and resets counters when groups are covered again. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[6] The RISC-V case study used six instruction groups—Arithmetic, Control Flow, Memory, Special & System, CSR, and Other—resulting in 36 coverage points. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[7] The case study configured the Coverage-guided Aging counter to 100 and decremented it after each newly generated instruction. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging