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Coverage-Observer

Tool WIKI v1 · 5/30/2026

Coverage-Observer is a runtime component in a cross-level processor verification setup for randomized, coverage-guided instruction-stream generation. It samples executed instructions, maps them to coverage points, and drives Coverage-guided Aging by updating counters and hinting the Instruction-Injector when coverage points have aged.

Overview

Coverage-Observer is a component in the cross-level processor verification approach described in Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging. The approach generates endless unrestricted instruction streams, co-simulates an RTL core with an Instruction Set Simulator (ISS), and continuously updates coverage information based on the ISS execution state.

Within this setup, the Coverage-Observer monitors executed instructions at runtime. It samples the executed instructions and looks up the matching coverage points. The paper describes it as the "heart" of the coverage-aging extension because it connects runtime coverage observation to the generation guidance mechanism.

Coverage model

The described implementation defines coverage points as the cross-product of instruction groups. The instruction groups are defined by a verification engineer to focus verification on functionality under test; examples include groups such as arithmetic or load/store instructions. This means coverage is tracked over combinations of instruction-group functionality rather than only over individual instructions.

In the reported RISC-V case study, six instruction groups were used as the basis for coverage points:

  • Arithmetic
  • Control Flow
  • Memory
  • Special & System
  • Control & Status Register (CSR)
  • Other

The cross-product of these six groups yielded 36 coverage points.

Role in Coverage-guided Aging

Coverage-Observer manages the Coverage-guided Aging counters associated with coverage points:

  1. When an instruction sequence covers a coverage point, Coverage-Observer sets the corresponding aging counter to a defined maximum value.
  2. Periodically, it decreases aging counters until a minimum limit is reached.
  3. When a counter reaches the minimum, Coverage-Observer gives a hint to the Instruction-Injector.
  4. The hint is a random instruction sequence needed to cover the aged coverage point, selected from instructions sampled dynamically during the run.
  5. If the relevant groups are covered again, Coverage-Observer resets the corresponding Coverage-guided Aging counter.

In the case study configuration, the Coverage-guided Aging counter was set to 100 and decremented after each newly generated instruction. The authors state that this value left enough room for random instructions while still triggering coverage points frequently.

Position in the verification flow

The broader verification flow uses randomized instruction generation, RTL-core co-simulation, an ISS reference model, an Instruction-Injector, a Comparator, and memory models. Coverage-Observer contributes runtime coverage feedback to this flow, enabling the randomized instruction stream to evolve dynamically according to observed coverage rather than remaining a simple unguided random stream.

CITATIONS

7 sources
7 citations
[1] Coverage-Observer is part of a cross-level verification approach that generates endless unrestricted instruction streams and uses ISS/RTL co-simulation with runtime coverage feedback. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[2] Coverage information is continuously updated based on the execution state of the ISS. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[3] Coverage-Observer samples executed instructions, looks up matching coverage points, watches executed instructions at runtime, and is described as the heart of the coverage-aging extension. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[4] The implementation defines coverage points as the cross-product of instruction groups defined by a verification engineer. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[5] Coverage-Observer sets aging counters when a coverage point is covered, periodically decreases them, sends hints to the Instruction-Injector at the minimum limit, and resets counters when groups are covered again. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[6] The RISC-V case study used six instruction groups—Arithmetic, Control Flow, Memory, Special & System, CSR, and Other—resulting in 36 coverage points. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
[7] The case study configured the Coverage-guided Aging counter to 100 and decremented it after each newly generated instruction. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging