Technique
Technique
1259 entities#
1 progressive memory allocation
2 2 experience replay
2 3 temporal-difference learning
2 4 Executable ISA Model
2 5 Encoding-Based Instruction Filtering
2 6 Branch Coverage Instrumentation
2 7 pipeline interaction coverage
2 8 Symbolic Trajectory Evaluation (STE)
2 9 Backtracking Solver
2 10 RTL Symbolization
2 11 Logic Fuzzer Enhanced Co-simulation
2 12 concatenation template composition
2 13 shift template composition
2 14 Interleaved Warp Generation
2 15 Per-Warp Generation Loop
2 16 Bottom-Up Implementation
2 17 Backward Data-Flow Analysis
2 18 object-oriented constraint-based instruction generation
2 19 Local Mutation Operator
2 20 FPGA-Based Hardware Emulation
2 21 PRIME+PROBE
2 22 FLUSH+RELOAD
2 23 Prompt Chaining
2 24 Evolutionary algorithm-based test generation
2 25 Feedback-Based Test Generation
2 26 RTL verification stimuli generation
2 27 Reorder Buffer Monitoring
2 28 ComputeStrip algorithm
2 29 Symbolic Execution for Test Generation
2 30 ReCompTotWt procedure
2 31 Structure-Aware Fuzzing
2 32 Functional test constraint derivation
2 33 Simulation-based Processor Verification
2 34 Randomized Test Generation
2 35 UVM testbench
2 36 Directed Simulation
2 37 Stateless Model Checking
2 38 Parallel Simulation for Multiple Scenarios
2 39 unified coverage methodology
2 40 MorFuzz
1 41 SystemVerilog Interface
1 42 Modport
1 43 Clocking Block
1 44 Verification Planning
1 45 Signal Direction Control
1 46 Timing Abstraction
1 47 Directed tests
1 48 Instruction Stream Generator (ISG)
1 49 Constrained-random instruction stream generation (ISG)
1 50 Random instruction stream generator
1 51 Auto-Regression
1 52 SystemVerilog stimulus/response features
1 53 random instruction sequence generation
1 54 Custom UVM Factory
1 55 hardware fuzz testing
1 56 language model-based fuzzer
1 57 CSP
1 58 Conditional CSP
1 59 MMU verification
1 60 Correlation Power Analysis
1 61 Mutual Information Analysis
1 62 Hamming Distance Model
1 63 Template Customization for Target Architecture
1 64 Brute-Force Selection
1 65 Ant Colony Optimization (ACO)
1 66 Simple Power Analysis
1 67 Fixed vs. Random TVLA
1 68 Welch's T-Test
1 69 Random Selection
1 70 Higher-Order Statistical Moment Analysis
1 71 Architecture-Independent Template Generation Method
1 72 Zero-Delay Model
1 73 Stochastic Search
1 74 Domain-Oriented Masking
1 75 stimulus-driven hardware fuzzing
1 76 Synopsys PrimeTime PX
1 77 Dynamic constraints
1 78 Inline constraints
1 79 Parallel constraint-solving
1 80 SAT/SMT-based constraint solving
1 81 Portfolio approach for constraint solving
1 82 Constrained random stimuli generation
1 83 Instruction-level randomization
1 84 Sequence-level randomization
1 85 State Subsumption Reduction (SSR)
1 86 Co-Simulation Harness
1 87 Platform-level randomization
1 88 Recurrent Neural Network-Based Constraint Alteration for PRG
1 89 Reaching Definition Analysis
1 90 virtual prototyping
1 91 Grey-box firmware fuzzing
1 92 Instrumentation
1 93 Asymmetric Simulation
1 94 RACE Solver
1 95 Sequential Instruction Field Randomization
1 96 Architecture-agnostic instrumentation
1 97 Feedback-guided input mutation
1 98 Metamorphic testing
1 99 Universal Verification Methodology (UVM)
1 100 Non-Progressing Testcase Filtering
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