Technique
Technique
1259 entities#
1 Intricate program generation
2 2 Threshold Implementation
2 3 retirement-level lockstep co-simulation
2 4 Bus Arbitration Verification
2 5 Object-Oriented Verification
2 6 prologue and epilogue instruction insertion
2 7 ptrace-based instruction execution
2 8 Constraint Satisfaction Problem (CSP) for Test Generation
2 9 Checkpoint Differential (CDIF)
2 10 Fork-Based Fast Checkpointing
2 11 LightSSS
2 12 Profile-Guided Optimization
2 13 LLM-in-the-loop RTL generation
2 14 Polynomial Formal Verification
2 15 model checking based test generation
2 16 Partial Order Reduction (POR)
2 17 Maintain-Arc-Consistency
2 18 multiprocessing fuzzing
2 19 random register value initialization
2 20 FPGA-Assisted RTL Verification
2 21 constraint solving for test generation
2 22 golden-reference model fuzzing
2 23 Architecture-aware stimulus generation
2 24 SVA Property Synthesis
2 25 ISA syntax correction
2 26 Seed Trimming
2 27 Pseudorandom Generator (PRG) Stimulus Generation
2 28 Instruction Generation
2 29 gradient-based sequence update
2 30 VIP Level Parallelism
2 31 Smart Coordination
2 32 TLM Fifo Asynchronous Communication
2 33 Feedback-Driven Coordination
2 34 Semantic Seed Triage
2 35 precise taint injection
2 36 Bitflip Mutation
2 37 Test Vector Clustering Post-Processing
2 38 data flow tracking (DFT)
2 39 Interdependent data/control-flow entangled instruction generation
2 40 random test data generation
2 41 Constraint Handling Rules
2 42 Inter-Process Communication
2 43 Constraint Logic Programming
2 44 recurrent neural network-based constraint alteration
2 45 overlapping template composition
2 46 Mutation-based compliance testing
2 47 Signal Tracing
2 48 pseudorandom generator (PRG)
2 49 Dynamic Binary Translation (DBT)
2 50 Weight Cache Seed Scoring
2 51 Pipelined Fuzzing
2 52 Signature File Comparison
2 53 Semantic-Aware Basic Block Encoding
2 54 Dynamic Program Analysis
2 55 failure code minimization
2 56 machine learning for test generation
2 57 Constraint-Based Branch Stimulus Generation
2 58 Lockstep Simulation
2 59 labeling phase
2 60 context-free grammar specification with annotations
2 61 Automatic Test Program Generation
2 62 Alarm-Based Infinite Loop Prevention
2 63 Model-Based Random Testing
2 64 Pseudo-Random Stimulus Generation
2 65 FPGA Prototyping
2 66 Deterministic Return from Interrupt Handler
2 67 Arithmetic Mutation
2 68 Automated Test Case Reduction
2 69 Instruction Fuzzing / Differential Testing
2 70 Direct Test Generation
2 71 Sequence Import/Export
2 72 Discrete Event Simulation
2 73 Evict+Time
2 74 Separation Logic for Machine Code
2 75 Counterexample-Driven Development
2 76 Supervised Learning
2 77 Machine Code Decompilation
2 78 Cross-Entropy Loss
2 79 Mean Square Error Loss
2 80 RISC-V Instruction Tokenization
2 81 Random Constraint-based Simulation
2 82 Delta Code Reduction (Binary Search)
2 83 Token Embedding
2 84 Post-processing Test Vector Clustering
2 85 curriculum learning
2 86 Endless Instruction Stream Generation
2 87 ISS-guided Generation
2 88 SAT-based Formal Verification
2 89 k-induction
2 90 Roulette Wheel Selection
2 91 Genetic Algorithm Test Generation
2 92 Pipelined Execution
2 93 Adam optimizer
2 94 Graph-based Functional Test Program Generation
2 95 golden model comparison
2 96 Formal Verification (FV)
2 97 Min-Conflict Solver
2 98 Markov decision process
2 99 Hardware-Based Control Flow Tracing
2 100 offset construction
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