Custom UVM Factory

Technique

A Custom UVM Factory is an optimization technique used by RISCV-DV to avoid the performance overhead of the standard UVM Factory when many instruction classes are registered. Instead of relying on class-name matching through UVM Factory data structures, RISCV-DV keys instruction objects by the numeric riscv_instr_name_t enumeration for faster instruction-object creation.

First seen 5/25/2026

Last seen 5/25/2026

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Custom UVM Factory

Overview

A Custom UVM Factory is a performance-oriented replacement for the standard UVM Factory in contexts where many object types must be registered and created frequently. In the RISCV-DV implementation described in the DVCon paper Crafting a Million Instructions/Sec RISCV-DV, the technique is used to accelerate instruction generation by bypassing the standard UVM Factory path. [C1]

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riscv-dv ← uses 100% 1e

RISCV-DV implements its own custom factory to accelerate instruction generation.

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riscv-dv implemented_in The evidence states that RISCV-DV implements its own custom factory to accelerate instruction generation.

CITATIONS

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5 citations — click to expand

[1] C1: RISCV-DV uses a custom factory to accelerate instruction generation by skipping the UVM Factory. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[2] C2: The UVM Factory supports type and instance overrides, maintains complex data structures, and can become slow because creation requires matching class names against registered classes. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[3] C3: RISCV-DV implements each RISC-V ISA instruction as a separate class, requiring hundreds of classes to be registered and making the UVM Factory extremely slow. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[4] C4: The custom factory registers instruction names to qualified class names, iterates through the registry, skips unsupported instructions, creates instruction instances, and stores them in instr_template. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[5] C5: RISCV-DV uses the riscv_instr_name_t enumeration to tag each instruction numerically, allowing the custom factory to hash objects using the enumeration and achieve faster matching during instruction-object creation. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings