Technique
Technique
1259 entities#
1 random test input generation
1 2 trap and interrupt handling
1 3 regular expression filtering
1 4 power level transition testing
1 5 two-phase evolution of variable length tests
1 6 bayesian network coverage-guided test generation
1 7 ID3 Algorithm
1 8 C4.5 Algorithm
1 9 privileged CSR setup randomization
1 10 Checkpoint-Based Regression
1 11 Non-Deterministic Source Masking
1 12 Seed-Based Deterministic Replay
1 13 Static Backward Slicing
1 14 page table randomization
1 15 Structured RISC-V Tokenizer
1 16 Random Network Distillation
1 17 Randomized Testing
1 18 FPGA Parallelism
1 19 bus cycle delay randomization
1 20 Dynamic Simulation
1 21 Symbolic Instruction Graphs
1 22 Formal Property Verification (FPV)
1 23 Automatic Test Program Generation for Pipelined Processors
1 24 LLM-aided Stimulus Generation
1 25 SystemVerilog Random Sequence Generator
1 26 Step-and-Compare Verification
1 27 hardware-assisted validation
1 28 Variant Ant Colony Optimization
1 29 Source-Based Code Coverage
1 30 Multi-Core Validation
1 31 MC/DC coverage
1 32 random test
1 33 boundary condition test
1 34 random constrained test
1 35 Asynchronous Lockstep-Compare Verification
1 36 Data-Path Lockstep Verification
1 37 custom instruction verification
1 38 branch-and-bound optimization
1 39 Trace-Compare Verification
1 40 Havoc Mutation
1 41 DPI-C
1 42 Power Scheduling
1 43 Binary Search for Address Filtering
1 44 Cryptographic Seed Initialization
1 45 multi-pass comparison checking
1 46 Constraint Satisfaction Problem-based Test Generation
1 47 Context Switching Optimization
1 48 SystemVerilog-based Verification
1 49 Retargetable Code Generation
1 50 AdamW Optimizer
1 51 C++ Reference Model Generation
1 52 GELU Activation
1 53 VHDL Reference Model Generation
1 54 mutation-based test-case generation
1 55 Dynamic Binary Translation
1 56 Verilog Reference Model Generation
1 57 Unit Testing
1 58 Asynchronous Programming
1 59 mark_vs_dirty
1 60 ldst_us_trans
1 61 ldst_stride_trans
1 62 ldst_index_trans
1 63 ldst_whole_trans
1 64 Bayesian Network Coverage-Directed Test Generation
1 65 Random Pattern Simulation
1 66 hybrid constraint solver
1 67 Sequential Randomization
1 68 Unsat Core Computation
1 69 Forward Branch Probability Enhancement
1 70 Python in Spike (PIS)
1 71 Spike in Python (SIP)
1 72 feature randomization
1 73 Partition Testing
1 74 executable specification
1 75 Backward Branch Loop Control
1 76 intricate program generation for CPU fuzzing
1 77 diverse instruction construction
1 78 Cell-Based Genetic Algorithm (CGA)
1 79 co-simulation for processor fuzzing
1 80 simulation acceleration
1 81 Constraint Logic Programming (CLP)
1 82 Biased-Random Simulation
1 83 Hierarchical Learning
1 84 Explainable AI (XAI)
1 85 Transfer Learning
1 86 CSR Decoder
1 87 Memory Allocation Minimization
1 88 Corner Case Biasing
1 89 Shallow Copy Optimization
1 90 UVM-Based Verification Environment
1 91 Randomised Interrupt Injection
1 92 Zeng, Z.
1 93 Automated Random Test Generation
1 94 coverage collector
1 95 monitor
1 96 Reinforcement Learning for Proof Generation
1 97 randomizing instruction generator
1 98 Markov-chain Monte Carlo
1 99 CSR Daisy-Chain Flow
1 100 model-based input generation
1