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STIMSMITH
Technique

Technique

1157 entities
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1
PowerPC verification methodology
1
2
Stuck-At Fault Coverage
1
3
Random Instruction Generator
1
4
linear programming for test generation
1
5
model checking for processor test generation
1
6
random test program generation using CSP
1
7
formal methods for processor verification
1
8
instruction mask-based targeted fuzzing
1
9
Test Compilation
1
10
RTL Compilation
1
11
instruction mutation
1
12
N-Version Disassembly
1
13
Direct Test Verification
1
14
Dynamic Instruction Generation
1
15
Weight-Based Transaction Control
1
16
UVM verification testbench
1
17
Data Comparison via Backdoor Read
1
18
Unaligned Address Testing
1
19
AXI Transaction ID Randomization
1
20
Seed-Based Regression Grading
1
21
UVM-based Random Instruction Generation
1
22
Bayesian Networks for Test Generation
1
23
Evolutionary Assembly Program Generation
1
24
Stimulus Generation via Assembler Programs
1
25
Grammatical Evolution
1
26
Stimulus Generation via C Programs
1
27
Shallow Copy Optimization
1
28
multi-agent framework
1
29
iterative refinement
1
30
logic gate shadow logic instrumentation (GLIFT)
1
31
Binary Decision Diagram Verification
1
32
Deduction-Guided Reinforcement Learning
1
33
Conflict-Driven Learning
1
34
RTLIFT
1
35
Functional Built-In Self Test
1
36
Burn-In Test
1
37
REST API Content Retrieval
1
38
Software-Based Self-Test
1
39
Compositional Model Checking
1
40
Automatic Verification
1
41
Unpipelining Verification
1
42
feedback-guided fuzzing
1
43
Fault Simulation
1
44
differential symbolic execution
1
45
BDD Representation
0
46
TIUP (Tautology-Induced Universal Properties)
0
47
DNF (Masks) Representation of Sets
0
48
Assumption-based Pruning
0
49
Knowledge Representation
0
50
Self-compositional framework
0
51
Expert Systems
0
52
Maintain-Arc-Consistency (MAC)
0
53
Instruction Generator
0
54
Variant Ant Colony Optimization (VACO)
0
55
BDD Solver
0
56
Technical intelligence
0
57
Soft-CSP Algorithm
0
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