ldst_stride_trans

Technique

ldst_stride_trans is a translation helper in QEMU's RISC-V vector (RVV) translator (target/riscv/insn_trans/trans_rvv.c.inc) that emits TCG code for RISC-V vector strided load/store instructions. Originally it conditionally called mark_vs_dirty() only on non-store paths, but a 2024 patch by Daniel Henrique Barboza removes the is_store guard so that mark_vs_dirty() is always invoked, matching the RVV spec's requirement that any instruction changing vector state must set mstatus.VS to Dirty (e.g. because stores zero env->vstart).

First seen 7/29/2026

Last seen 7/29/2026

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WIKI

Overview

ldst_stride_trans() is a translation-time helper defined in target/riscv/insn_trans/trans_rvv.c.inc within QEMU's RISC-V vector (RVV) TCG translator. It emits the TCG sequence that realizes RISC-V vector strided load and store instructions (those that use an explicit per-element stride from an x register).

The helper is one of a family of related vector load/store translators in the same file:

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RELATIONSHIPS

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mark_vs_dirty uses → 98% 1e

ldst_stride_trans() must call mark_vs_dirty() unconditionally to reflect changes in vector CSR state.

trans_rvv.c.inc part of → 95% 1e

ldst_stride_trans() is defined in trans_rvv.c.inc.

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mark_vs_dirty USES Extracted graph relationship

trans_rvv.c.inc PART_OF Extracted graph relationship

CITATIONS

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6 citations — click to expand

[1] ldst_stride_trans originally called mark_vs_dirty() only when !is_store, guarded by an if statement. [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too

[2] The 2024 patch by Daniel Henrique Barboza removes the is_store guard so that mark_vs_dirty() is always called in ldst_stride_trans. [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too

[3] The change is motivated by RVV spec section 3.2, which requires mstatus.VS to become Dirty whenever vector state (including vector CSRs) is changed, regardless of whether the operation is a load or a store. [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too

[4] Store operations still change vector state because vext_ldst_us() in vector_helper.c resets env->vstart to zero after execution. [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too

[5] The same patch applies the analogous unconditional mark_vs_dirty() change to ldst_us_trans, ldst_index_trans, and ldst_whole_trans in target/riscv/insn_trans/trans_rvv.c.inc. [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too

[6] The patch fixes the regression introduced by commit 8e1ee1fb57 ("target/riscv: rvv-1.0: add translation-time vector context status"). [PATCH 1/3] trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too