Skip to content
STIMSMITH
18 results

Randomized Testing of RISC-V CPUs using Direct Instruction Injection

 Paper
Paper

CPU

 Concept
Concept

UVM Based Design Verification of a RISC-V CPU Core

 Paper
Paper

Testing CPU Emulators

 Paper
Paper

CPU Verification

 Concept
Concept

CPU emulator

 Concept
Concept

Examiner: Automatically Locating Inconsistent Instructions between Real Devices and CPU Emulators for ARM

 Paper
Paper

CPU Bug Detection

 Concept
Concept

CPU-assisted test-case generation

 Technique
Technique

CPU state

 Concept
Concept

CPU state comparison

 Concept
Concept

CPU Opcode Generation

 Concept
Concept

SPEC CPU2006

 Tool
Tool

Superscalar-RISC-V-CPU

 Concept
CodeArtifact

MIPS-CPU

 Concept
CodeArtifact

Ibex CPU

 Tool
Tool

ISAAC: Intelligent, Scalable, Agile, and Accelerated CPU Verification via LLM-aided FPGA Parallelism

 Paper
Paper

CPU stimulus generation

 Concept
Concept