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STIMSMITH

DiffTest

Tool
First seen 6/6/2026
Last seen 6/6/2026
Evidence 8 chunks

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RELATIONSHIPS

12 connections
DiffTest-H ← compares with 100% 2e
DiffTest-H is compared to the baseline DiffTest framework for speedup.
Co-simulation uses → 100% 2e
DiffTest is a co-simulation framework for processor verification.
verification events uses → 100% 2e
DiffTest covers 32 types of verification events.
DPI-C interface uses → 90% 2e
DiffTest uses individual DPI-C functions for each verification event.
ISA co-simulation implements → 99% 1e
Difftest is explicitly described as an ISA co-simulation framework.
architectural state comparison implements → 98% 1e
Difftest compares architectural states between DUT and REF to detect bugs.
NEMU uses → 98% 1e
Difftest uses NEMU as the reference model for co-simulation.
RTL uses → 95% 1e
Difftest operates on an RTL processor, monitoring instruction commits and state updates.
coremark workload evaluates → 93% 1e
Difftest is used to run and verify the coremark workload on XiangShan.
waveform dump implements → 92% 1e
Difftest supports dumping waveforms when a bug is detected.
XiangShan evaluates → 97% 1e
Difftest is used to verify the XiangShan processor implementation.
XiangShan ← uses 97% 1e
XiangShan uses Difftest for ISA co-simulation based verification.