Concept
Concept
4823 entities#
1 Advanced Encryption Standard (AES) Benchmark
2 2 Data Encryption Standard (DES) Benchmark
2 3 Multimedia and Cryptography Benchmarks
2 4 tightly coupled memory
2 5 riscv_tcm_top.v
2 6 regular instruction
2 7 opcode
2 8 mask
2 9 match
2 10 unratified extension
2 11 encoding.h
2 12 instr_dict.json
2 13 instr-table.tex
2 14 priv-instr-table.tex
2 15 inst.chisel
2 16 inst.sverilog
2 17 inst.rs
2 18 instr_dict
2 19 rv64
2 20 RISC-V I extension
2 21 Measurement to Disclosure
2 22 Power Frame File
2 23 Pre-Silicon Evaluation
2 24 Test Bench Generator
2 25 WDDL PRESENT S-Layer
2 26 Context-Sensitive Probabilities
2 27 C Token Categories for Prompt Templates
2 28 Binary File Mutation
2 29 MMU Stress Testing
2 30 Test Suite Minimization
2 31 Instruction Diversity
2 32 Human-in-the-Loop Triage
2 33 Algorithm 1: Filter for Non-Progressing Testcases
2 34 Algorithm 2: Reachability Analysis for Uncovered Point
2 35 Algorithm 3: LLM-Guided Property Generation
2 36 valid instruction sequences
2 37 Speculative Execution Verification
2 38 Computer Program Product for Random Loop Test Generation
2 39 Processor Pre-Silicon Functional Verification
2 40 hierarchical leakage analysis
2 41 speculative execution vulnerability
2 42 Zkt extension
2 43 DIVUW instruction
2 44 REMW instruction
2 45 Type System
2 46 Type Quantifier
2 47 Kind Annotation
2 48 Expression Language
2 49 Register Type
2 50 Mapping Definition
2 51 Termination Measure
2 52 Attribute Annotation
2 53 Vector Type
2 54 Control Unit (CU)
2 55 ALU Reduced
2 56 Automatic Constraint Generation
2 57 RISC-V Instruction Set Verification
2 58 uart_tx.v
2 59 simple_cpu_buggy.v
2 60 TLM Analysis Ports
2 61 RVV Specification v0.9
2 62 Vector Instruction Test Suite
2 63 VLEN
2 64 TLM-RTL Transactor
2 65 Mixed-Abstraction Verification
2 66 Mixed-Medium Verification
2 67 VerifRoCCStandaloneWrapper
2 68 Structural and Value Coverage Rules
2 69 Instruction Decoder Verification
2 70 Abstract Local Execution
2 71 Silent Data Corruption (SDC)
2 72 Database of Diff Hashes (DoH)
2 73 Fault Space
2 74 Coordinate List Format (COO)
2 75 golden reference simulation
2 76 Havoc Mutation
2 77 Infinite Loop Prevention
2 78 FPGA Acceleration for Fuzzing
2 79 pipeline synchronization
2 80 Fault Localization
2 81 Finite Domain
2 82 Sail type system
2 83 XML extraction tool
2 84 Framemaker document
2 85 ELF executable format
2 86 memory barrier instruction
2 87 PPOCA litmus test
2 88 LB+datas+WW litmus test
2 89 MP+sync+addr-cr litmus test
2 90 mixed-size memory access
2 91 in-flight instruction tree
2 92 stw instruction
2 93 lwz instruction
2 94 coherence relation
2 95 undefined value semantics
2 96 system_state type
2 97 micro_op_state type
2 98 runTestRIG.py
2 99 Shadow Variable
2 100 Activity Constraint
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