Architecture Verification Program
ConceptAn Architecture Verification Program (AVP) is an assembly-level test program used in processor design verification to validate that a hardware implementation conforms to its architectural specification. AVPs exercise every instruction under normal, boundary, and exception conditions and must run correctly on any realization of the architecture. In industrial practice, AVPs are generated by dedicated test program generators such as IBM's AVPGEN, which combines symbolic execution, constraint solving, and biasing to produce effective AVP tests.
First seen 6/13/2026
Last seen 6/13/2026
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Definition
An Architecture Verification Program (AVP) is a test program used in the design verification of hardware processors. AVPs are written to satisfy verification requirements derived from a processor's architectural specification, and are required to run correctly on any realization of that architecture. They check the conformance of processor designs to the specified architecture (see [AVPGEN]—A Test Generator for Architecture Verification, IBM Research, IEEE Transactions on VLSI Systems, 1995).
Purpose and Role in Processor Verification
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1 connectionsAVPGEN generates architecture verification programs (AVPs) as test artifacts.
LINKED ENTITIES
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Implementation Verification Program RELATED_TO IVP is defined and contrasted with AVP in the evidence, forming a complementary test suite for implementation-specific verification.
VHDL USED_BY VHDL (IEEE standard 1076-1987) is named as a hardware description language used to drive the hardware simulator in AVP-based verification flows.
Behavioral Simulator USED_BY The behavioral simulator is used to predict expected AVP output for comparison against hardware simulator results.
Symbolic Execution USES_TECHNIQUE Symbolic execution is explicitly cited as a novel concept used by AVPGEN to generate effective AVP tests.
constraint solving USES_TECHNIQUE Constraint solving is explicitly cited as a novel concept used by AVPGEN to generate effective AVP tests.
CITATIONS
14 sources14 citations — click to expand
[1] An AVP is a test program used to check the conformance of processor designs to the specified architecture. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[2] AVPGEN uses novel concepts of symbolic execution and constraint solving along with biasing techniques to generate effective AVP tests. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[3] Unlike many earlier systems that make biased random choices, AVPGEN often chooses intermediate or final values and then solves for initial values that can lead to the desired values. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[4] AVPGEN provides a language called SIGL (Symbolic Instruction Graph Language) for specifying templates with symbolic constraints, combined with biasing functions to focus tests on interesting conditions. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[5] AVPGEN has been used successfully to debug many IBM S/390 processors and is an integral part of the design process for these processors. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[6] AVPGEN was published in the IEEE Transactions on VLSI Systems in 1995. AVPGEN—A Test Generator for Architecture Verification for IEEE Transactions on VLSI Systems - IBM Research
[7] The goal of processor verification is to ensure equivalence of a processor and its architectural specification, typically achieved by simulation due to impracticality of formal proof and exhaustiveness. Test program generator - International Business Machines Corporation
[8] Design verification is carried out by simulating assembly-level test programs on a hardware simulator (such as VHDL, IEEE 1076-1987) and comparing results with those of a behavioral simulator. Test program generator - International Business Machines Corporation
[9] AVP requirements call for testing every instruction under normal, boundary, and exception conditions, and AVPs are required to run correctly on any realization of the architecture. Test program generator - International Business Machines Corporation
[10] AVPs are distinct from IVPs: AVPs derive from the architecture specification while IVPs derive from the design work-book and HDL design, testing caches, pipelines, and units such as a Carry Look-Ahead adder or a bit-rotator. Test program generator - International Business Machines Corporation
[11] Manually written AVPs are not cost effective; the approach dedicates substantial verification effort and produces tests that are often too simple because engineers struggle to define complex situations. Test program generator - International Business Machines Corporation
[12] Earlier automatic test program generators include A. Aharon et al., 'Verification of the IBM RISC System/6000 By a Dynamic Biased Pseudo-Random Test Program Generator' (IBM Systems Journal, April 1991) and EP-A-453394. Test program generator - International Business Machines Corporation
[13] A typical test program generator (described in R1) spans about 150,000 lines of C code, reflecting the complexity of modern architectures with hundreds of instructions and around ten functional units. Test program generator - International Business Machines Corporation
[14] A typical processor architecture includes hundreds of instructions, a few dozen resources (main memory, GPRs, SPRs, floating point units, address translation, external interrupt mechanisms), and a few-hundred-page architecture description. Test program generator - International Business Machines Corporation