memory management unit
ConceptA memory management unit is represented in the provided evidence as a component of the VAMP processor memory interface. In VAMP, two Memory Management Units access the instruction and data caches, which then access physical memory over a bus protocol.
First seen 5/25/2026
Last seen 8/16/2026
Evidence 16 chunks
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Overview
In the provided evidence, a memory management unit is discussed in the context of the VAMP processor. The VAMP memory interface consists of two Memory Management Units. These units access the processor's instruction and data caches, and the caches in turn access physical memory through a bus protocol.
Role in the VAMP memory interface
NEIGHBORHOOD
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17 connectionsMemory Management Units are discussed in the context of memory protection and spatial safety.
Memory segments are specified as part of the MMU
SBVer has knowledge of the memory management unit built into it.
SBVer has knowledge about the memory management unit built in.
CHERI-RISC-V VP++ includes an MMU for virtual address translation.
RISC-V VP++ includes an MMU for virtual address translation.
Virtual memory management uses the MMU for address translation.
The VAMP includes two Memory Management Units.
RV64 Core Page Based MMU Tests show that page based virtual memory testing uses the MMU.
Memory management units are listed as system elements whose behavior is described.
The paper describes a tool for automatically generating test programs for MIPS64 MMUs
Address translation is a key mechanism of the MMU
TLBs are part of the MMU
Cache memory is part of the MMU
Page tables are part of the MMU
MicroTESK models and verifies the memory management unit as a microprocessor subsystem.
The memory management unit is a component of the microprocessor design.
LINKED ENTITIES
1 linksCITATIONS
5 sources5 citations — click to expand
[1] VAMP memory interface contains two Memory Management Units Test Program Generation for a Microprocessor: A Case Study
[2] The Memory Management Units access instruction and data caches, which access physical memory via a bus protocol Test Program Generation for a Microprocessor: A Case Study
[3] VAMP implements different caching and virtual-memory infrastructures Test Program Generation for a Microprocessor: A Case Study
[4] Address translation is not visible in the VAMP assembler model, where computations live in linear virtual memory space Test Program Generation for a Microprocessor: A Case Study
[5] The assembler model represents memory as a mapping from natural numbers to integers Test Program Generation for a Microprocessor: A Case Study