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CVA6

CodeArtifact

CVA6 is the OpenHW Group CORE-V RISC-V processor repository. The provided public context describes it as a highly configurable, 6-stage RISC-V core for application and embedded use, with application-class configurations capable of booting Linux. In the MICRO-54 paper "Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation," CVA6 was one of three RISC-V cores evaluated with Dromajo and Dromajo enhanced with Logic Fuzzer; the paper reports six CVA6 bugs, four found by Dromajo alone and two found with Dromajo plus Logic Fuzzer.

First seen 5/27/2026
Last seen 6/8/2026
Evidence 18 chunks
Wiki v3

WIKI

Overview

CVA6 is an OpenHW Group CORE-V RISC-V processor. The provided GitHub context describes openhwgroup/cva6 as a highly configurable, 6-stage RISC-V core for application and embedded applications, with application-class configurations capable of booting Linux. The same context records the repository language as Assembly, with 2,949 stars, 952 forks, and an update timestamp of 2026-05-28T05:31:18Z. [repo-summary]

Use in Dromajo and Logic Fuzzer evaluation

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RELATIONSHIPS

5 connections
MorFuzz ← evaluates 100% 4e
MorFuzz is evaluated on the CVA6 RISC-V processor and discovers bugs in it.
The paper evaluates Logic Fuzzer and Dromajo on the CVA6 RISC-V core.
Dromajo ← evaluates 100% 4e
Dromajo was integrated and evaluated with the CVA6 core.
Logic Fuzzer ← evaluates 100% 2e
Logic Fuzzer was applied to CVA6 to find additional bugs.
RISC-V ISA implements → 100% 1e
CVA6 is a RISC-V processor implementing the RISC-V ISA.