2026-06-16
1 items 44 entities 55 connections
Processed 44 entities and 55 relations.
Micro-processor verification using a C++11 sequence-based stimulus engine Stephan Bourduas Chris Mikulis Cavium SGen UVM sequence-based stimulus generation PPIGen Raven Cadence Perspec Breker TrekSOC IBM Genesys-Pro assembly generator C++11 random stimulus generation directed test generation knob-based instruction generation constraint-based random stimulus generation lambda functions weighted set wset class rand_intf class reg_helper class reg_init_seq bare_sequence class factory pattern arm_factory simd_factory RTL verification exerciser run SystemVerilog processor instruction stream generation pipelined processor verification ARM server core ThunderX ThunderX2 linear programming for test generation finite state machine based test generation graph-based test generation genetic programming for test generation polymorphic function wrapper regular expressions auto specifier SIMD instructions