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Micro-processor verification using a C++11 sequence-based stimulus engine

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First seen 6/16/2026

Last seen 6/16/2026

Evidence 3 chunks

01

NEIGHBORHOOD

18 nodes · 23 edges

graph · Micro-processor verification using a C++11 sequence-based stimulus engine · depth=1

02

RELATIONSHIPS

17 connections

PPIGen mentions → 100% 2e evidence

The paper mentions PPIGen as a prior random generator used at Cavium.

C++11 uses → 100% 2e evidence

The paper describes the use of C++11 features as key enablers for SGen.

Cavium authored by → 100% 1e evidence

Both authors are affiliated with Cavium.

SGen introduces → 100% 1e evidence

The paper introduces and presents SGen, a sequence-based assembly generator.

UVM mentions → 100% 1e evidence

The paper mentions UVM as an industry standard that is insufficient for micro-processor verification.

Raven mentions → 100% 1e evidence

The paper mentions Raven as an industrial tool for processor test generation.

Cadence Perspec mentions → 100% 1e evidence

The paper mentions Cadence Perspec as an industrial SoC verification tool.

Stephan Bourduas authored by → 100% 1e evidence

Stephan Bourduas is listed as an author of the paper.

IBM Genesys-Pro mentions → 100% 1e evidence

The paper mentions IBM Genesys-Pro as an industrial verification tool.

linear programming for test generation mentions → 100% 1e evidence

The paper mentions linear programming as one approach for generating test programs.

finite state machine based test generation mentions → 100% 1e evidence

The paper mentions finite state machines as an approach to test generation.

graph-based test generation mentions → 100% 1e evidence

The paper mentions graph-based generation as an approach to test generation.

genetic programming for test generation mentions → 100% 1e evidence

The paper mentions genetic programming as an approach to test generation.

constraint-based random stimulus generation mentions → 90% 1e evidence

The paper mentions constraint-satisfaction problem solvers as an approach to random stimulus generation.

Pipelined Processor Verification mentions → 100% 1e evidence

The paper mentions pipelined processor verification as a particularly challenging problem.

Breker TrekSOC mentions → 100% 1e evidence

The paper mentions Breker TrekSOC as an industrial tool for self-checking C tests.

Chris Mikulis authored by → 100% 1e evidence

Chris Mikulis is listed as an author of the paper.