Skip to content
STIMSMITH

ExactStep

Tool
First seen 7/10/2026
Last seen 7/10/2026
Evidence 2 chunks

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

17 connections
Device Tree Blob uses → 95% 2e
ExactStep accepts device tree blob files as input for platform configuration.
VirtIO uses → 95% 2e
ExactStep supports VirtIO block and network devices via command-line options.
RV64IMAC implements → 100% 2e
ExactStep implements the RV64IMAC CPU model.
SystemC Bus Interfacing implements → 95% 1e
ExactStep supports SystemC bus interfacing as a library.
QEMU compares with → 95% 1e
ExactStep is contrasted with QEMU in terms of simulation approach, specifically not using dynamic binary translation.
RV32IMAC implements → 100% 1e
ExactStep implements the RV32IMAC CPU model.
ARMv6-M implements → 100% 1e
ExactStep implements the ARM-v6m CPU model.
ELF uses → 100% 1e
ExactStep uses ELF libraries and loads ELF files for simulation.
Bare-Metal Execution uses → 95% 1e
ExactStep is used to run bare-metal executables compiled for supported ISAs.
Instruction Trace uses → 90% 1e
ExactStep provides an instruction trace feature via the --trace flag.
RISC-V compliance tests evaluates → 100% 1e
ExactStep passes the RISC-V Compliance Tests for multiple categories.
ultraembedded authored by → 90% 1e
ExactStep is hosted under the ultraembedded GitHub organization.
cpu::step() ← part of 100% 1e
cpu::step() is the core execution function of the ExactStep simulator.
Instruction Set Simulator implements → 100% 1e
ExactStep is described as an instruction accurate instruction set simulator.
cpu::step() uses → 100% 1e
ExactStep uses cpu::step() as its instruction execution mechanism.
Instruction-Accurate Simulation implements → 100% 1e
ExactStep executes one instruction per call to cpu::step(), embodying instruction-accurate simulation.
Co-simulation implements → 95% 1e
ExactStep is designed for use as a library for cosimulation.